tag: IP

Using IP-XACT To Solve Design And Verification Problems
By Anika Malhotra - 13 Oct, 2021 - Comments: 0

As today’s SoC designs grow more complex and time-to-market (TTM) pressures rise, designers are looking for techniques to build and update designs easily. Key elements for addressing these SoC challenges include the incorporation of more commercial IP components, internal design IP reuse, and extensive automation of design and verification activities. Enhanced interoperability and reusability... » read more

GPIO IP For Automotive Functional Safety
By Nidhi Bhasin - 07 Oct, 2021 - Comments: 0

By Nidhi Bhasin, Shivakumar Chonnad, Vladimir Litovtchenko, and Sowjanya Syamala The prevalence and complexity of electronics and software (EE systems) in automotive applications are increasing with every new generation of car. The critical functions within the system on a chip (SoC) involve hardware and software that perform automotive-related signal communication at high data rates to and ... » read more

Containing The Explosion In Data
By Brian Bailey - 23 Sep, 2021 - Comments: 0

The amount of data that could be kept for every design is gargantuan, but even that may not be enough these days as lifecycle management, continuous verification, regulatory requirements, and globalization add to the data that needs to be stored. But data has no value if it cannot be found or used in ways that provide more benefit than the cost of storing it. "Data management is not unique t... » read more

Integrated Ethernet PCS And PHY IP For 400G/800G Hyperscale Data Centers
By Priyank Shukla - 09 Sep, 2021 - Comments: 0

Ethernet has become the primary network protocol of choice for the required server-to-server communication in hyperscale data centers, as it allows hyperscalers to disaggregate network switches and install their software operating systems independently. Ethernet enables cost-effective, dense, open switches and networking technologies which reduce cost/power per bit with transistor scaling. Ethe... » read more

The Difference Between Processor Configuration And Customization
By Roddy Urquhart - 26 Aug, 2021 - Comments: 0

For many years, people have been talking about configuring processor IP cores, but especially with growing interest in the open RISC-V ISA, there is much more talk about customization. So, what is the difference? A simple analogy is to think of ordering a pizza. With most pizzerias, you have standard bases and a choice of toppings from a limited list. You can configure the pizza to the ... » read more

Building A More Secure SoC
By Gajinder Panesar - 05 Aug, 2021 - Comments: 1

SoC integrators know that a software-only chip security plan leaves devices open to attack. All that a hacker needs to do is find a way to replace key parts of the bootloader or the low-level firmware to compromise other software in the system used to support secure access. The most simple attacks come remotely over a network, and these can be patched with software upgrades. However, we see ... » read more

Protecting Automotive SoCs Starts With Secure IP
By Dana Neustadter - 05 Aug, 2021 - Comments: 0

The automotive industry is undergoing a significant transformation. Cars are becoming more sophisticated and valuable with increased connectivity and capabilities to provide a better user experience. They are also collecting and transmitting more and more sensitive data and thus are becoming very attractive targets for attacks. Cybercrime in the automotive industry is growing rapidly. How bad i... » read more

EDA, IP Numbers In Record Territory
By Ed Sperling - 16 Jul, 2021 - Comments: 0

EDA and semiconductor IP revenue soared to a new high, up 17% worldwide in Q1 compared to the same period in 2020, with revenue in China surging 73%, according to new data from SEMI's Electronic System Design Alliance. For many financial reports outside of semiconductors, strong growth numbers can be misleading because they reflect comparatively weak earnings stemming from pandemic-related s... » read more

Lower Power Chips: What To Watch Out For
By Ann Mutschler - 08 Jul, 2021 - Comments: 0

Low-power design in advanced nodes and advanced packaging is becoming a multi-faceted, multi-disciplinary challenge, where a long list of issues need to be solved both individually and in the context of other issues. With each new leading-edge process node, and with increasingly dense packaging, the potential for problematic interactions is growing. That, in turn, can lead to poor yield, cos... » read more

Cell Library Verification Using Symbolic Simulation
By Hari Sathianathan - 07 Jul, 2021 - Comments: 0

Standard cell libraries have been a mainstay of chip design for many decades since the inception of logic synthesis and composition methodologies. Cell library IP typically contains Verilog models describing the cell functionality, schematic derived transistor level netlists, place and route views, physical layout views, post-layout extracted netlists as well as characterized timing and power m... » read more

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