Improving DRAM Device Performance Through Saddle Fin Process Optimization


As DRAM technology nodes have scaled down, access transistor issues have been highlighted due to weak gate controllability. Saddle Fins with Buried Channel Array Transistors (BCAT) have subsequently been introduced to increase channel length, prevent short channel effects, and increase data retention times [1]. However, at technology nodes beyond 20nm, securing sufficient device performance (su... » read more

LPDDR5X: High Bandwidth, Power Efficient Performance For Mobile & Beyond


Looking back over recent history in the memory landscape, we can clearly see a trend of new applications growing sufficiently large enough to command the creation of new memory technologies tailored to their specific needs. We saw this with the creation of GDDR for graphics and later HBM for AI/ML applications. Low-Power Double Data Rate (LPDDR) emerged as a specialized memory designed for mobi... » read more

Journey From Cell-Aware To Device-Aware Testing Begins


Early results of using device-aware testing on alternative memories show expanded test coverage, but this is just the start. Once the semiconductor industry realized that it was suffering from device failures even when test programs achieved 100% fault coverage, it went about addressing this disconnect between the way defects manifest themselves inside devices and the commonly used fault mod... » read more

HBM3 And GDDR6: Memory Solutions For AI


AI/ML changes everything, impacting every industry and touching the lives of everyone. With AI training sets growing at a pace of 10X per year, memory bandwidth is a critical area of focus as we move into the next era of computing and enable this continued growth. AI training and inference have unique feature requirements that can be served by tailored memory solutions. Learn how HBM3 and GDDR6... » read more

Memory Disaggregation Research And Making It Practical With Hardware Trends (U. of Michigan)


A new technical paper titled "Memory Disaggregation: Advances and Open Challenges" was published by researchers at University of Michigan. Abstract "Compute and memory are tightly coupled within each server in traditional datacenters. Large-scale datacenter operators have identified this coupling as a root cause behind fleet-wide resource underutilization and increasing Total Cost of Owners... » read more

Week In Review: Semiconductor Manufacturing, Test


TECHCET is forecasting semiconductor precursor revenues, both for high-ƙ metal dielectrics and low-ƙ dielectrics, will increase in the second half of 2023, rebounding from the current zero percent growth rate. Wafer start volumes are expected to rebound in 2024 with expansions in 2nm and 3nm logic devices. SEMI also predicts the global slump in semiconductor sales will end this quarter, gi... » read more

GDDR6 Delivers The Performance For AI/ML Inference


AI/ML is evolving at a lightning pace. Not a week goes by right now without some new and exciting developments in the field, and applications like ChatGPT have brought generative AI capabilities firmly to the forefront of public attention. AI/ML is really two applications: training and inference. Each relies on memory performance, and each has a unique set of requirements that drive the choi... » read more

From Data Center To End Device: AI/ML Inference With GDDR6


Created to support 3D gaming on consoles and PCs, GDDR packs performance that makes it an ideal solution for AI/ML inference. As inference migrates from the heart of the data center to the network edge, and ultimately to a broad range of AI-powered IoT devices, GDDR memory’s combination of high bandwidth, low latency, power efficiency and suitability for high-volume applications will be incre... » read more

Meeting The Major Challenges Of Modern Memory Design


Memory lies at the heart of every electronics application, and demand is growing all the time. Users want ever greater capacity, throughput, and reliability. At the same time, time to market (TTM) goals and competitive pressures mandate that memories be developed in ever shorter project schedules. These requirements put enormous pressure on designers of discrete memory chips, memory dies in 2.5... » read more

How eMRAM Addresses The Power Dilemma In Advanced-Node SoCs


By Rahul Thukral and Bhavana Chaurasia Our intelligent, interconnected, data-driven world demands more computation and capacity. Consider the variety of smart applications we now have. Cars can transport passengers to their destinations using local and remote AI decision-making. Robot vacuum cleaners keep our homes tidy, and smartwatches can detect a fall and call emergency services. With hi... » read more

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