tag: memory

GDDR6 Delivers The Performance For AI/ML Inference
By Frank Ferro - 15 May, 2023 - Comments: 0

AI/ML is evolving at a lightning pace. Not a week goes by right now without some new and exciting developments in the field, and applications like ChatGPT have brought generative AI capabilities firmly to the forefront of public attention. AI/ML is really two applications: training and inference. Each relies on memory performance, and each has a unique set of requirements that drive the choi... » read more

From Data Center To End Device: AI/ML Inference With GDDR6
By Rambus - 03 May, 2023 - Comments: 0

Created to support 3D gaming on consoles and PCs, GDDR packs performance that makes it an ideal solution for AI/ML inference. As inference migrates from the heart of the data center to the network edge, and ultimately to a broad range of AI-powered IoT devices, GDDR memory’s combination of high bandwidth, low latency, power efficiency and suitability for high-volume applications will be incre... » read more

Meeting The Major Challenges Of Modern Memory Design
By Synopsys - 26 Apr, 2023 - Comments: 0

Memory lies at the heart of every electronics application, and demand is growing all the time. Users want ever greater capacity, throughput, and reliability. At the same time, time to market (TTM) goals and competitive pressures mandate that memories be developed in ever shorter project schedules. These requirements put enormous pressure on designers of discrete memory chips, memory dies in 2.5... » read more

How eMRAM Addresses The Power Dilemma In Advanced-Node SoCs
By Rahul Thukral - 13 Apr, 2023 - Comments: 0

By Rahul Thukral and Bhavana Chaurasia Our intelligent, interconnected, data-driven world demands more computation and capacity. Consider the variety of smart applications we now have. Cars can transport passengers to their destinations using local and remote AI decision-making. Robot vacuum cleaners keep our homes tidy, and smartwatches can detect a fall and call emergency services. With hi... » read more

DDR5 Memory Enables Next-Generation Computing
By John Eble - 13 Apr, 2023 - Comments: 0

Computing main memory transitions may only happen once a decade, but when they do, it is a very exciting time in the industry. When JEDEC announced the publication of the JESD79-5 DDR5 SDRAM standard in 2021, it signaled the beginning of the transition to DDR5 server and client dual-inline memory modules (Server RDIMMs, Client UDIMMs and SODIMMs). We are now firmly on this path of enabling the ... » read more

How To Safeguard Memory Interfaces By Design
By Dana Neustadter - 06 Apr, 2023 - Comments: 0

By Dana Neustadter and Brett Murdock In 2017, the credit bureau Equifax announced that hackers had breached its system, unleashing the personal information of 147-million people. As a result, the company has settled a class action suit for $425 million to aid those impacted, including identity theft, fraud, financial losses, and the expenses to clean up the damage. Whether the threat is iden... » read more

Impact Of Increased IC Performance On Memory
By Ed Sperling - 30 Mar, 2023 - Comments: 0

Increasing performance in advanced semiconductors is becoming more difficult as chips become more complex. There are more physical effects to contend with, different use cases, and challenges in making memory go faster. In addition, aging effects that once were ignored are now becoming critical concerns. Steven Woo, fellow and distinguished inventor at Rambus, talks about different factors that... » read more

Feasibility of Using Domain Wall-Magnetic Tunnel Junction for Magnetic Analog Addressable Memories
By Technical Paper Link - 23 Mar, 2023 - Comments: 0

A new technical paper titled "Domain Wall-Magnetic Tunnel Junction Analog Content Addressable Memory Using Current and Projected Data" was published by researchers at UT Austin and Samsung Advanced Institute of Technology (SAIT). Abstract "With the rise in in-memory computing architectures to reduce the compute-memory bottleneck, a new bottleneck is present between analog and digital conver... » read more

A Comparative Evaluation Of DRAM Bit-Line Spacer Integration Schemes
By Dempsey Deng - 16 Mar, 2023 - Comments: 0

With decreasing dynamic random-access memory (DRAM) cell sizes, DRAM process development has become increasingly difficult. Bit-line (BL) sensing margins and refresh times have become problematic as cell sizes have decreased, due to an increase in BL parasitic capacitance (Cb). The main factor impacting Cb is the parasitic capacitance between the BL and the node contact (CBL-NC) [1]. To reduce ... » read more

How Low Can You Go? Pushing The Limits Of Transistors
By Synopsys - 08 Mar, 2023 - Comments: 0

Deep low voltage enablement of embedded memories and logic libraries to achieve extreme low power: Rising demand for cutting-edge mobile, IoT, and wearable devices, along with high compute demands for AI and 5G/6G communications, has driven the need for lower power systems-on-chip (SoCs). This is not only a concern for a device’s power consumption when active (dynamic power), but also when... » read more

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