tag: Mentor Graphics

From Simulation To Emulation
By Mentor, a Siemens Business - 12 Aug, 2015 - Comments: 0

This paper introduces an acceleration-ready UVM framework and explains why it is needed, how to create it, and what its benefits are. By following the principles presented here, users will be able to write block-level UVM environments that can be reused directly in emulation. This approach has provided remarkable results in various customer environments, yielding a 50 to 5000X performance gain ... » read more

Blog Review: Aug. 12
By Jesse Allen - 12 Aug, 2015 - Comments: 0

SIM cards are protected by AES-128, which is supposed to be virtually unbeatable by a brute-force attack. But there's still a weakness: Rambus' Aharon Etengoff reports on how a researcher at Jiao Tong University exploited side-channel attack techniques to crack the encryption codes protecting 3G and 4G SIM cards. After recent reports on compromised car security, auto makers are likely search... » read more

Making Hardware Design More Agile
By Ed Sperling - 12 Aug, 2015 - Comments: 1

Semiconductor engineering sat down to whether changes are needed in hardware design methodology, with Philip Gutierrez, ASIC/FPGA design manager in [getentity id="22306" comment="IBM"]'s FlashSystems Storage Group; Dennis Brophy, director of strategic business development at [getentity id="22017" e_name="Mentor Graphics"]; Frank Schirrmeister, group director for product marketing of the System ... » read more

In-Vehicle Network Design Methodology
By Mentor, a Siemens Business - 06 Aug, 2015 - Comments: 0

The complexity of in-vehicle networks puts the traditional design processes to a test. Last-minute changes, difficult verification, testing, and similar issues add to the challenges. However, changing the design paradigm to a structured engineering process can lead to better, cheaper, and easier network designs. With the right tools to support such a process, the network design itself becomes a... » read more

Blog Review: Aug. 5
By Jesse Allen - 05 Aug, 2015 - Comments: 0

Fresh from the July 2015 Type-C InterOp Event, where USB engineers wheel a prototype on a cart from hotel room to hotel room, testing interoperability, Synopsys' Morten Christiansen says Type-C has arrived. Mentor's Colin Walls discusses the reasons to tackle embedded software development with a bottom-up approach. In their latest video, Cadence's Kishore Kasamsetty discusses why choose L... » read more

Which Process, Material, IP?
By Ed Sperling - 30 Jul, 2015 - Comments: 1

For years chipmakers have been demanding more choices. They've finally gotten what they wished for—so many possibilities, in fact, that engineering teams of all types are having trouble wading through them. And to make matters worse, some choices now come with unexpected and often unwanted caveats. At the most advanced nodes it's a given that being able to shrink features and double patter... » read more

USB Connectors Get Smarter
By Ann Mutschler - 30 Jul, 2015 - Comments: 0

By now, there’s quite a buzz about the new USB Type-C spec given that it provides for a reversible plug connector for USB devices and cabling, aiming to end the endless cable flipping to make sure the orientation is correction. To avoid confusion, while developed at about the same time as the USB 3.1 specification, it is distinct from that one. When it comes to software support for Type-C,... » read more

Making Hardware Design More Agile
By Ed Sperling - 30 Jul, 2015 - Comments: 0

Semiconductor engineering sat down to whether changes are needed in hardware design methodology, with Philip Gutierrez, ASIC/FPGA design manager in [getentity id="22306" comment="IBM"]'s FlashSystems Storage Group; Dennis Brophy, director of strategic business development at [getentity id="22017" e_name="Mentor Graphics"]; Frank Schirrmeister, group director for product marketing of the System ... » read more

Why DSA Is Cost Effective For 7nm And Below
By Yuansheng Ma - 30 Jul, 2015 - Comments: 0

The upcoming 7nm process node presents tough challenges both for printability and cost. At 7nm and below, multi-patterning is required, which makes the manufacturing process more expensive by requiring more masks. To control costs, any alternative technology that provides equivalent yields with fewer patterning steps should be explored. One promising option is to use directed self-assembly (... » read more

Analog FastSpice Platform Full-Spectrum Sampled Periodic Noise Analysis
By Mentor, a Siemens Business - 29 Jul, 2015 - Comments: 0

Many high-performance analog/mixed-signal ICs include track-and-hold circuits to sample analog signals at one or more discrete timepoints per period. Although track-and-hold circuits are periodic, traditional periodic noise (pnoise) analysis does not apply because it measures the device noise impact integrated over an entire period rather than at instantaneous time points within the target peri... » read more

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