tag: Mentor Graphics

Trouble Spots And Optimism For 2015
By Ed Sperling - 18 Dec, 2014 - Comments: 0

Most top executives in the semiconductor industry are bullish about 2015 and even beyond, particularly as the [getkc id="76" comment="Internet of Things"] begins to drive new markets and market mash-ups, and as more semiconductors find their way into markets such as automotive, health-care and manufacturing. But it's not an entirely rosy picture, and top executives point to potential trouble sp... » read more

Is The Stacked Die Ecosystem Stagnating?
By Ann Mutschler - 18 Dec, 2014 - Comments: 2

It is now widely agreed that not much has been happening in terms of adoption for 2.5D interposer and 3D ICs. “It seems like everyone is still at the starting line waiting for the race to begin," said Javier DeLaCruz, senior director of engineering of [getentity id="22242" e_name="eSilicon"]. "Interposer assembly and IP availability for effectively using the [getkc id="82" comment="2.5D IC... » read more

Manufacturing Constraint Fears Grow
By Ed Sperling - 18 Dec, 2014 - Comments: 0

The semiconductor industry could become a victim of its own success. With so many semiconductors being consumed inside of cars, home electronics and industry, capacity shortages are beginning to surface in some areas. Foundries set rates depending upon a complex mix of process technology, equipment depreciation, customer demand and the need to push customers from one node the next depending ... » read more

FPGA Verification with Assertions: Why Bother?
By Mentor, a Siemens Business - 17 Dec, 2014 - Comments: 0

This paper provides a practical, easy, step-by- step set of instructions on how to add assertions to your RTL design. By following the simple guidelines provided in this paper you will benefit by cutting simulation debugging time in half, as well as finding very complex bugs that are likely to escape traditional simulation without assertions. To read more, click here. » read more

Blog Review: Dec. 17
By Ed Sperling - 17 Dec, 2014 - Comments: 0

Ansys' Bill Vandermark unearths the top five engineering articles for this week. Check out the ship-based laser weapon used to destroy drones. There's also a product called The Sphere that allows you to do strange things like answer the phone by tapping on the refrigerator. Bet you didn't think of that one. Cadence's Steve Carlson lists the top five things that can go wrong in mixed signal ... » read more

Hybrid Verification: The Only Way Forward
By Brian Bailey - 15 Dec, 2014 - Comments: 0

Semiconductor Engineering sat down to discuss the state of the industry for [getkc id="10" kc_name=" functional verification"]. The inability of RTL [getkc id="11" kc_name="simulation"] to keep up with verification needs is causing rapid change in the industry. Taking part in the discussion are Harry Foster, chief scientist at [getentity id="22017" e_name="Mentor Graphics"]; Janick Bergeron, fe... » read more

Week 27: Announcing DAC TV
By Anne Cirkel - 12 Dec, 2014 - Comments: 1

I’m just back from a few days in San Jose, which luckily is only a short flight away from Portland. After so many of these trips I've found that most of the time I'm surrounded by familiar faces and the one or two flustered employees that couldn’t catch their much more convenient corporate commuter flight. I have to admit the idea of bypassing airport security and just showing my badge, gra... » read more

The Week In Review: Design/IoT
By Ed Sperling - 12 Dec, 2014 - Comments: 0

Tools Cadence rolled out a use-case scenario verification tool that automates some test development that has been done manually in the past. The new tool accelerates development of software-driven tests and debug to ferret out complex SoC-level bugs. Cadence claims a 10X productivity improvement. Mentor Graphics uncorked a new version of its verification IP for PCI Express. The new IP decre... » read more

Yield Ramp Challenges Increase
By Ann Mutschler - 11 Dec, 2014 - Comments: 0

As semiconductor manufacturing moves down to smaller process nodes, there’s no doubt that it is increasingly difficult to ramp both test and manufacturing yields. One reason for this is simply scale. Smaller nodes translate into more steps and greater complexity in the manufacturing process, with attendant process variations. “Smaller process nodes increase the amount of embedded mem... » read more

Eight Steps For Ensuring PCB Assembly Success
By Mentor, a Siemens Business - 11 Dec, 2014 - Comments: 0

So, you have invented and designed the next hit product, poised to wreak havoc with the competition and ensure continued financial success for the company for a long time into the future. Guess what though; the job is not done until the product hits the street. In between design and sales is printed circuit board (PCB) manufacturing and assembly. All critical business metrics, including, cos... » read more

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