tag: packaging

Technology Advances, Shortages Seen For Wire Bonders
By Mark LaPedus - 17 Feb, 2022 - Comments: 2

A surge in demand for IC packages is causing long lead times for wire bonders, which are used to assemble three-fourths of the world’s packages. The wire bonder market doubled last year, alongside advanced packaging’s rise. Wirebonding is an older technology that typically flies under the radar. Still, packaging houses have multitudes of these key tools that help assemble many — but no... » read more

Thermal Management Implications For Heterogeneous Integrated Packaging
By Cameron Nelson - 17 Feb, 2022 - Comments: 1

As the semiconductor industry reaches lower process nodes, silicon designers struggle to have Moore's Law produce the results achieved in earlier generations. Increasing the die size in a monolithic system on chip (SoC) designs is no longer economically viable. The breakdown of monolithic SoCs into specialized chips, referred to as chiplets, presents significant benefits in terms of cost, yield... » read more

Thin Quad Die Package (QDP) Development
By Shaun Bowers - 20 Jan, 2022 - Comments: 0

In the world of solid-state memory fabs, bits per mm2 rule. In the memory packaging market, mm2 of silicon per a given package thickness is the defining feature. Both the memory architecture of the wafer and the package technology take advantage of 3D structures to achieve best in class bit density. In the case of the wafer fab, 3D NAND and other technologies are pushing the envelope to meet ev... » read more

Covid Masks And Forecasts At Semicon
By Mark LaPedus - 16 Dec, 2021 - Comments: 0

Semicon West 2021 was certainty different, if not surreal, this year. The annual event was held in-person from Dec. 7-9, although there is a virtual component that runs until Jan. 7, 2022. In comparison, Semicon West was an all-virtual event in 2020, due to the Covid-19 pandemic. At this year’s in-person event in San Francisco, attendees, exhibitors and speakers were all required to wea... » read more

Design Process And Methodology For Achieving High-Volume Production Quality For HDFO Packaging
By Ruben Fuentes - 16 Dec, 2021 - Comments: 0

Unlike the traditional system on chip (SoC) design process, which has fully qualified verification methods embodied in the form of process design kits (PDKs), chip design companies and outsourced semiconductor assembly and test (OSAT) suppliers have typically had no integrated circuit (IC) package co-design sign-off verification process to help ensure that an IC package will meet manufacturabil... » read more

Achieving Success In Automotive Leadframe Packages
By John Nickelsen - 22 Nov, 2021 - Comments: 0

The growth of semiconductor content in automotive applications has been accelerating. This growth drives all families of semiconductor packaging in all regions. The growth is happening in the latest advanced, laminate-based packages using flip chip interconnect as well as the venerable leadframe packages using wirebond interconnect. The automotive market consumes micro-electromechanical systems... » read more

The New Technology Solutions For Advanced SiP Devices
By YongJai Seo - 18 Nov, 2021 - Comments: 0

For many years, System-in-Package (SiP) technology has been a focus for semiconductor packaging to address the ongoing market trend of system integration and size reduction. Today’s increased complexity and higher package density for SiP devices has driven the development of new packaging technologies. In response, compartmental shield technology makes it possible to put several functions int... » read more

Failure Prediction Is Vital for Packaging Technology
By Sam Sadri - 18 Nov, 2021 - Comments: 0

A while back, I wrote a post on what I call the “10 Commandments of Packaging” – my list of the key things to bear in mind with respect to developing new packaging solutions. Today, packaging engineers must contend with more variables than ever, from new substrate materials to more types of packages with a greater range of complexity. With that complexity comes new challenges, and I felt ... » read more

Optimizing System-Level Connectivity In Heterogenous Automotive Packages
By Keith Felton - 04 Nov, 2021 - Comments: 0

By Keith Felton and Cristina Somma With the massive growth of electronics in the automotive sector (such as autonomous driving, electric vehicles, and safety systems), the complexity, capabilities, and volume of semiconductors is rapidly increasing the demand for greater package connectivity density. This has led to high-end IC-package solutions, such as copper pillar bumping with very fi... » read more

The New Technology Solutions For Advanced SiP Devices
By YongJai Seo - 21 Oct, 2021 - Comments: 0

For many years, system-in-package (SiP) technology has been a focus for semiconductor packaging to address the ongoing market trend of system integration and size reduction. Today’s increased complexity and higher package density for SiP devices has driven the development of new packaging technologies. In response, compartmental shield technology makes it possible to put several functions int... » read more

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