tag: SRAM

A New Memory Contender?
By Mark LaPedus - 02 Jan, 2018 - Comments: 1

Momentum is building for a new class of ferroelectric memories that could alter the next-generation memory landscape. Generally, ferroelectrics are associated with a memory type called ferroelectric RAMs (FRAMs). Rolled out by several vendors in the late 1990s, FRAMs are low-power, nonvolatile devices, but they are also limited to niche applications and unable to scale beyond 130nm. While... » read more

Four Foundries Back MRAM
By Mark LaPedus - 23 Aug, 2017 - Comments: 4

Four major foundries plan to offer MRAM as an embedded memory solution by this year or next, setting the stage for what finally could prove to be a game-changer for this next-generation memory technology. GlobalFoundries, Samsung, TSMC and UMC plan to start offering spin-transfer torque magnetoresistive RAM (ST-MRAM or STT-MRAM) as an alternative or a replacement to NOR flash, possibly start... » read more

What Is Spin Torque MRAM?
By Mark LaPedus - 17 Aug, 2017 - Comments: 0

The memory market is going in several different directions at once. On one front, the traditional memory types, such as DRAM and flash, remain the workhorse technologies. Then, several vendors are readying the next-generation memory types. As part of an ongoing series, Semiconductor Engineering will explore where the new and traditional memory technologies are heading. For this segment, P... » read more

Rethinking Computing Fundamentals
By Ed Sperling - 10 Aug, 2017 - Comments: 0

New compute architectures—not just new chips—are becoming a common theme in Silicon Valley these days. The whole semiconductor industry is racing to find the fastest, cheapest, lowest-power approach to processing. The drivers of this shift are well documented. Moore's Law is slowing down, in part because it's becoming more difficult to route signals across an SoC at the latest process no... » read more

Enabling Magnetic Tunnel Junctions Array Processing For Embedded STT MRAM
By Mahendra Pakala - 24 Apr, 2017 - Comments: 0

The semiconductor industry is entering a new era of next-generation memory technologies, with several major inflections taking shape. Among these is the emergence of Magnetic RAM (MRAM). Over several posts, I’ll provide background on what is driving the adoption of MRAM, highlight some of the initial challenges and discuss progress on making STT MRAM commerically viable. Today, a typical m... » read more

New Memories And Architectures Ahead
By Brian Bailey - 13 Feb, 2017 - Comments: 4

Memory dominates many SoCs, and it is rare to hear that a design contains too much memory. However, memories consume a significant percentage of system power, and while this may not be a critical problem for many systems, it is a bigger issue for Internet of Things ([getkc id="76" kc_name="IoT"]) edge devices where total energy consumption is very important. Memory demands are changing in al... » read more

New Embedded Memories Ahead
By Mark LaPedus - 25 Jan, 2017 - Comments: 0

The embedded memory market is beginning to heat up, fueled by a new wave of microcontrollers (MCUs) and related chips that will likely require new and more capable nonvolatile memory types. The industry is moving on several different fronts in the embedded memory landscape. On one front, traditional solutions are advancing. On another front, several vendors are positioning the next-generatio... » read more

Performance Increasingly Tied To I/O
By Ed Sperling - 18 Jan, 2017 - Comments: 0

Speeding up input and output is becoming a cornerstone for improving performance and lowering power in SoCs and ASICs, particularly as scaling processors and adding more cores produce diminishing returns. While processors of all types continue to improve, the rate of improvement is slowing at each new node. Obtaining the expected 30% to 50% boost in performance and lower power no longer can ... » read more

Using Automated Pattern Matching For SRAM Physical Verification
By Elven Huang - 15 Dec, 2016 - Comments: 0

How often have you struggled to verify static random-access memory (SRAM) blocks in your design? And how often, no matter how much time you spend on them, do they end up causing manufacturing issues? Memory is a critical component in today’s SoC designs, often consuming 50% or more of the die area. SRAM blocks are typically assembled in a layout using a set of specific intellectual propert... » read more

SRAM Physical Verification With Calibre Pattern Matching
By Mentor, a Siemens Business - 14 Dec, 2016 - Comments: 0

Traditional SRAM verification flows can require significant resources to implement and support, and still miss critical errors that result in manufacturing defects. Using the Calibre Pattern Matching automated pattern-based solution provides accurate results, avoids costly mask re-spins, and is easily updated to add newly developed SRAM IP cells. To read more, click here. » read more

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