Four Foundries Back MRAM

Next-gen embedded memory technology ramps up in wake of flash scaling issues.

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Four major foundries plan to offer MRAM as an embedded memory solution by this year or next, setting the stage for what finally could prove to be a game-changer for this next-generation memory technology.

GlobalFoundries, Samsung, TSMC and UMC plan to start offering spin-transfer torque magnetoresistive RAM (ST-MRAM or STT-MRAM) as an alternative or a replacement to NOR flash, possibly starting later this year. This represents a big shift in the market, because until now only Everspin has shipped MRAM for various applications, such as a battery-backed SRAM replacement, write-cache and others.

The next big opportunity for STT-MRAM is the embedded memory IP market. NOR flash, the traditional embedded memory, is running into an assortment of issues as it migrates from 40nm to 28nm and beyond. So the backing of these foundries could transform STT-MRAM into a de facto replacement technology at advanced nodes.

STT-MRAM uses the magnetism of electron spin to provide non-volatile properties in chips. In effect, it combines the speed of SRAM and the non-volatility of flash. Perhaps even more important, it has virtually unlimited endurance.

“Embedded flash will continue to be the data retention champion in harsh environments, especially for automotive and safety applications,” said Dave Eggleston, vice president of embedded memory at GlobalFoundries. “That’s where embedded flash will have a long life. But it doesn’t scale very well. As you get down to 28nm or below, embedded flash actually becomes an expensive option.”

So the industry needs a new solution, and STT-MRAM happens to be ready for embedded memory applications at 2xnm and beyond. “Embedded STT-MRAM has promising opportunities in replacing embedded flash in MCUs and SoCs for automotive, IoT, consumer and mobile,” said Alan Niebel, chief executive of Web-Feet Research. “Complementing first and then replacing embedded DRAM and SRAM is also a huge opportunity for MRAM that would add persistence capabilities to processors.”

Still to be seen, however, is whether STT-MRAM would ever fulfill its long-awaited promise of replacing DRAM altogether. That may never happen. Regardless, MRAM may end up being a big market or a niche solution, depending on several factors.

On the plus side, STT-MRAM will soon be ready from more than one vendor and for a range of applications. In addition, the move by major foundries to enter into the STT-MRAM space will likely boost the economies of scale and drive down the costs of the technology.

But there are still some challenges, as not all foundry customers will require chips at 22nm and beyond. Plus, STT-MRAM is a relatively new technology and it may take customers time to integrate it. And there is also an assortment of manufacturing challenges.

What is next-gen memory?

In the works since the 1990s, MRAM is one of several next-generation memory types. These are nonvolatile technologies that provide unlimited endurance. Like flash, they retain the data when the power is shut off in a system. In contrast, DRAM is volatile and it loses the data when the power is shut down, although the information is transferred to storage beforehand.

Besides MRAM, the other next-generation memories include carbon nanotube RAMs, ferroelectric RAMs (FRAMs), phase-change and resistive RAMs (ReRAM).

Carbon nanotube RAMs use nanotubes to form resistive states in devices. Meanwhile, FRAMs use a ferroelectric capacitor to store data. Then, 3D XPoint technology from Intel and Micron is an example of a next-generation phase-change memory. Another technology, ReRAM, is based on the electronic switching of a resistor element. In fact, SMIC, TSMC and UMC are developing ReRAM with various partners.

While these technologies are promising, many have taken much longer to develop than previously anticipated. “Most of these novel memory technologies have been in R&D for quite some time, but they continued to struggle with cost and scalability to compete with traditional memory technology,” said Yau Kae Sheu, assistant vice president of embedded nonvolatile memory at UMC.

Clearly, traditional memories—DRAM, flash and SRAM—remain the workhorse technologies in the market. In today’s memory hierarchy in systems, SRAM is integrated into the processor for cache to enable fast data access. Then, DRAM, the next tier in the hierarchy, is used for main memory. And disk drives and NAND-based solid-state storage drives (SSDs) are used for storage.

Today, the memory market is booming, especially for 3D NAND. “(The) driving force is demand for SSDs in data centers,” said Toshiki Kawai, president and chief executive of Tokyo Electron Ltd. (TEL) in a recent presentation.

It is also fueling the demand for wafer fab equipment (WFE). “Calendar 2017 WFE CapEx forecast (is projected) to increase by over 10% year-over-year, driven by investments in next-generation 3D NAND and advanced logic,” Kawai said.

Meanwhile, several next-generation memory types are beginning to ramp up. Right now, 3D XPoint and STT-MRAM arguably have the most momentum, with carbon nanotube RAMs, FRAM and ReRAM waiting in the wings.

Most, if not all, of these technologies will likely find sockets at some point. There is no one single memory that can serve all needs. “You have ReRAM, PCM, 3D XPoint and STT-MRAM,” said David Fried, chief technology officer at Coventor. “What’s going to win? They will all potentially find homes in specific applications.”

MRAM, for one, is already finding sockets in the market. In traditional memory, the data is stored as an electric charge. In contrast, MRAM uses a magnetic tunnel junction (MTJ) memory cell for the storage element. “We use magnetics or the manipulation of electron spin to control the resistance of the bit, which allows us to program 1s and 0s,” said Phillip LoPresti, president and chief executive of Everspin.

Everspin’s first MRAM devices are called toggle MRAMs, which are geared for the SRAM-based battery backup market. Today, though, the industry is focusing on a next-generation technology called perpendicular STT-MRAM or ST-MRAM.


Fig. 1: Spin Torque MRAM Technology. Source: Everspin

“STT-MRAM uses the current directly through the cell,” said Er-Xuan Ping, managing director of memory and materials within the Silicon Systems Group at Applied Materials. “It uses spin polarized current to basically force a change of magnetization in that film.”

Toggle MRAMs are widely used in the field, but they have some scaling limitations. “STT-MRAM has several advantages. One of them is scaling,” Ping said. “STT-MRAM has other advantages over traditional MRAM, because you put the current directly through the cell. It is more efficient to use that energy to switch the magnetization. It is much higher than a field-driven MRAM.”

In a recent presentation, Seung Kang, director of engineering at Qualcomm, listed some of the key attributes of STT-MRAM:

• Non-volatility with the same characteristics as DRAM and SRAM;
• Practically unlimited endurance, and
• Fast with low voltage, and
• CMOS friendly.



Fig. 2: 1T-1MTJ pSTT-MRAM architecture. Source: GlobalFoundries

STT-MRAM, however, has the following challenges:

• Complex film stacks;
• Narrow sensing margin, and
• Solder reflow retention.

For some time, though, Everspin has been shipping MRAM, including a 256-megabit perpendicular STT-MRAM, based on a 40nm process from its foundry partner, GlobalFoundries. Everspin is sampling a 1-gigabit part based on 28nm.

As part of a licensing deal with Everspin, GlobalFoundries is developing embedded STT-MRAM for its upcoming 22nm FD-SOI platform. Over time, the foundry plans to develop embedded MRAM for its 12nm FD-SOI process as well as 14nm and 7nm finFETs.

GlobalFoundries will soon have some company. Samsung, TSMC and UMC are separately developing the technology for embedded customers. Samsung has its own IP, while others are working with various partners.

From its standpoint, Everspin is embracing what might be considered competition. “All of this is good from our point of view,” Everspin’s LoPresti said. “It validates the industry. It is also going to accelerate the economies of scale of the production equipment. If (foundries) are launching MRAM, that means they are going to the tool guys and asking them to put in place production tools that have good throughput and ROI.”

Besides Everspin and the foundries, Intel, Micron and the Toshiba-SK Hynix duo have MRAM efforts in R&D. Meanwhile, several startups, such as Avalanche, Crocus and Spin Transfer Technologies are developing it.

Making STT-MRAM
For most, making MRAM is easier said than done. MRAM involves the development of new materials, integration schemes and equipment.

It also has a different process flow than traditional memory. Generally, the MRAM process starts in a traditional fab, where a foundry vendor fabricates a standard CMOS wafer with circuitry in the so-called front-end-of-the-line (FEOL). The circuitry could incorporate a transistor scheme or a device like a microcontroller (MCU).

Then, the device and/or a substrate are shipped to a separate fab facility called the backend-of-the-line (BEOL). The BEOL is where the metal layers and tiny copper interconnects are fabricated on top of the device.

STT-MRAM is built in the BEOL in a fab. In effect, the STT-MRAM memory layers are built on top of a contact or via at one of the metal layers of a chip, such as metal layer 4 (M4) or others.


Fig. 3: Embedded MRAM. Source: Everspin

In contrast, DRAM and flash are processed in the FEOL in memory fabs. In the FEOL, traditional memories are processed at higher temperatures.

With MRAM, though, the magnetic films are thin and unable to withstand higher temperatures, so MRAM is fabricated in the BEOL where the temperatures are much lower. “The magnetic films are very thin. You can’t have very high temperatures for them,” Applied’s Ping said.

Fabricating STT-MRAM is a delicate process. A problem could surface if the steps aren’t precise. Shorts can often occur, thereby impacting yield. Defectivity is also challenging.

For starters, STT-MRAM requires three mask steps for the following parts—bottom electrode, top electrode and MTJ cell. The first step is to deposit a thin layer of material, which becomes the bottom electrode. Then, here comes the first hard part—forming the film stack. The film stack may have 20 to 30 layers. The trick is to deposit these films on top of each other with precision.

“It’s a very thin film in the range of a few angstroms,” Ping said. “You stack them to maximize the magnetization.”

In some cases, STT-MRAM is fabricated within an enclosed cluster tool using various process modules. The modules include separate chambers for physical vapor deposition (PVD), anneal and ion beam etch.

The film stack will run into problems if it is exposed to air. “You need to etch and encapsulate it in one machine,” said Thorsten Lill, vice president at Lam Research. “You can’t expose the wafer to air.”

STT-MRAM consists of an MTJ memory cell. An MTJ uses a thin dielectric tunneling barrier film based on magnesium oxide (MgO), which is sandwiched by two ferromagnetic layers based on a cobalt-iron-boron (CoFeB) compound. In operation, the current passes through the MgO film, which is about 10 angstroms thick. The CoFeB layer is 10 to 30 angstroms, according to Applied Materials.


Fig. 4: pMTJ film stack details, (b) and (c) shows cross section and top view of the pMTJ array. Source: Applied Materials

In the fab, the stack can be tuned. “The interesting thing about MRAM is depending on how you build the stack, you can have lower or higher temperature devices. You can have it be like flash or SRAM. All of this can be done with a tweak of the stack,” Lam’s Lill said.

Then, the film stack is annealed, followed by the next big challenge—etch. To form the desired size and dimensions of the MTJ stack, a resist is deposited on the surface and then etched.

Traditional reactive ion etch (RIE) tools are not used in STT-MRAM, because they would damage the stack. Instead, the industry uses ion beam etch (IBE), which etches the films using charged ion beams.

In IBE, ion beams hit the surface. “It’s sputtering,” Lill said “It’s called chemically-enhanced ion beam etching. The first generation is pure noble gas argon xenon sputtering.”

IBE has some challenges, however. “An ion beam etcher has a limitation on the pitch. When you go to smaller pitches, there is a shadowing effect. The technology is still being developed,” Applied’s Ping said.

Then, after IBE, the device is encapsulated. At each step, the device undergoes various metrology steps. “We expect these new architectures to drive new sets of requirements for metrology and inspection,” said Neeraj Khanna, senior director of customer engagement at KLA-Tencor.

Killer apps?
Amid the progress in the fab, STT-MRAM is currently gaining steam in several markets. “There are two use cases. The first one is to replace embedded flash. The other one would be embedded SRAM, which is a tougher use case,” Lam’s Lill said. “It looks like the industry consensus is that STT-MRAM is a good embedded solution. Then, phase-change and ReRAM could be standalone devices. ReRAM could also be embedded.”

For years, the industry has been exploring the development of STT-MRAM as a replacement for DRAM. Those efforts remain in R&D.

Regardless of the apps, the industry faces some challenges to bring the technology into more of the mainstream. For example, STT-MRAM still needs to prove that it can meet the strict reliability and data retention specs at high temperatures for automotive.

“It took many years to design and develop the basic STT-MRAM memory technology,” Web-Feet’s Niebel said. “It takes at least seven years to develop and produce a new NVM technology and then another five to seven years to integrate it into the customer’s product cycle.”

For its part, Everspin is targeting its STT-MRAM for write-cache applications in SSDs and RAID systems. Typically, SSDs use a DRAM-based buffer to help speed up the system. But if the system loses power, the data is at risk. So, SSDs will also incorporate capacitors, but this adds cost to the system.

To solve that issue, STT-MRAM can be incorporated in the write-buffer socket in the SSD. “As soon as data is written into our parts, because they are nonvolatile, you no longer have to connect to supercapacitors or batteries,” Everspin’s LoPresti said.

Another market, embedded memory, is also heating up, especially for MCUs. Generally, MCUs integrate several components on the same chip, such as a CPU, SRAM, embedded memory and peripherals. Embedded memory, such as NOR flash, are used for code storage and other functions.

MCUs are migrating from 40nm to 28nm, and NOR is following the same migration path. At the 2xnm nodes, however, NOR begins to suffer from slow write speeds and endurance issues. It also becomes more expensive, as it requires more mask steps.

Beyond 28nm, NOR is difficult to scale. “So people are looking for alternatives,” UMC’s Sheu said. “That’s why emerging memory gets a lot of attention these days.”

Replacing NOR with a new memory type is not a simple task. “The critical requirements for these competing novel memory types to proliferate are performance, reliability, density and cost,” Sheu said.

So how will this all play out? “We continue to expect that 28nm is going to be a long node,” he said. “Existing floating-gate technology at 28nm has proven to work very well in this space. The performance, endurance and cost benefit makes traditional eNVM a versatile solution. With the maturity, it is expected to dominate a variety of applications, such as IoT, automotive and mobile devices for years to come.”

Others agree. “Embedded flash will be around for a long time,” GlobalFoundries’ Eggleston said. “For the conservative customers who just don’t want to change, they will continue to look for embedded flash from the foundries to extend into low geometries.”

Right now, though, STT-MRAM appears to be ready for the embedded market at the 2xnm nodes. The other memory types are still stuck in R&D. “For embedded, what we see is a need for speed,” Eggleston said. “MRAM can give you high endurance and fast write speed with low write energy. The cost adder for MRAM is the same or slightly less than embedded flash.”

In a recent paper, GlobalFoundries disclosed it has demonstrated STT-MRAM technology in a 40-Mbit array. The technology has a low bit error rate and 10 years of data retention at 125 degrees Celsius with extended endurance to about 107 cycles.

Based on this data, embedded MRAM is ideal for even the more rigid applications. “Embedded flash will be around for automotive,” he said. “But in some applications, even automotive, eMRAM can take over.”

In another example of an application, an MCU could incorporate embedded STT-MRAM and SRAM. MRAM would replace embedded flash for code storage.

Embedded STT-MRAM could also assume some of the SRAM-based cache functions, thereby saving space and cost. “You don’t get rid of SRAM, but you might reduce the amount of SRAM you have on board,” he said. “The SRAM and eMRAM work together.”

What’s next?
As the industry is developing STT-MRAM, it is also working on futuristic MRAM technologies in R&D. One technology, dubbed spin orbit torque (SOT) MRAM, is being developed as a replacement for SRAM-based cache.

“There is some evidence that they provide some advantages like lower switching currents and the ability to retain data and operate at higher speeds,” Everspin’s LoPresti said. “But they are very early in their developmental phases.”

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  • memister

    The MRAM backing appears “spotty” because Samsung and GlobalFoundries only endorsed MRAM with SOI while TSMC and UMC also back ReRAM. So it still looks like a popular option but not an industry signal.