tag: Synopsys

On-chip Monitor Analytics Scales With Silicon Chip Production From NPI Through HVM
By Guy Cortez - 10 Jul, 2025 - Comments: 0

By Guy Cortez and Dan Alexandrescu At the New Product Introduction (NPI) stage of silicon chip production, product engineers work with a limited but critical dataset – typically from initial silicon samples or engineering lots – enabling early assessment of the power and performance of your silicon. Analytics solutions typically have no time-to-results (TTR) issues when the volume of dat... » read more

Easing The Stress For Package-Level Burn-In
By Laura Peters - 10 Jul, 2025 - Comments: 0

Considered something of a necessary evil, burn-in of IC packages during production weeds out latent defects so they don’t turn into failures in the field. But as AI and multi-chiplet packages become more common, and concerns about aging circuitry heighten, shifting stress testing to the wafer level looks increasingly attractive from a quality, throughput, and cost standpoint. The shift is ... » read more

PUFs In A Post-Quantum World
By Synopsys - 09 Jul, 2025 - Comments: 0

With the looming threat of quantum computing on the horizon, the security landscape is changing. Explore the emerging threat and its implications for current cryptographic standards. This white paper provides an in-depth analysis of quantum computing's impact on security and explains how PUF technology can help you maintain robust security in the quantum era. Why Read This? Quantum Comp... » read more

AI Pushes High-End Mobile From SoCs To Multi-Die
By Liz Allan - 08 Jul, 2025 - Comments: 0

Advanced packaging is becoming a key differentiator for the high end of the mobile phone market, enabling higher performance, more flexibility, and faster time to market than systems on chip. Monolithic SoCs likely will remain the technology of choice for low-end and midrange mobile devices because of their form factor, proven record, and lower cost. But multi-die assemblies provide more fle... » read more

Driving The Future: How Rust And Virtual ECUs Are Transforming AUTOSAR Classic Automotive Software
By Synopsys - 08 Jul, 2025 - Comments: 0

By Nicolas Amringer and Stefan Pruisken The landscape of automotive software is undergoing significant transformation, driven by growing system complexity, stringent safety standards, and the need for streamlined development cycles. Virtual ECUs (vECUs) have become indispensable for accelerating both development and validation processes. In this context, the adoption of Rust within AUTOSAR C... » read more

AI: A New Tool For Hackers, And For Preventing Attacks
By Ann Mutschler - 08 Jul, 2025 - Comments: 0

Semiconductor Engineering sat down to discuss hardware security challenges, including new threat models from AI-based attacks, with Nicole Fern, principal security analyst at Keysight; Serge Leef, AI-For-Silicon strategist at Microsoft; Scott Best, senior director for silicon security products at Rambus; Lee Harrison, director of Tessent Automotive IC Solutions at Siemens EDA; Mohit Arora, seni... » read more

LLM-Powered Automatic VLSI Design Flow Tuning Framework
By Technical Paper Link - 08 Jul, 2025 - Comments: 0

A new technical paper titled "CROP: Circuit Retrieval and Optimization with Parameter Guidance using LLMs" was published by researchers at Duke University and Synopsys. Abstract "Modern very large-scale integration (VLSI) design requires the implementation of integrated circuits using electronic design automation (EDA) tools. Due to the complexity of EDA algorithms, the vast parameter space... » read more

Chip Industry Week in Review
By The SE Staff - 03 Jul, 2025 - Comments: 0

[Editor's Note: Early edition due to the U.S. July 4th holiday.] The U.S. government lifted export restrictions that barred Synopsys, Siemens EDA, and Cadence from selling EDA tools to China. In a statement, Synopsys said it received a letter from the U.S. Commerce Department immediately rescinding those restrictions. Siemens issued a similar statement. Which tools or hardware accelerated t... » read more

Blog Review: July 2
By Jesse Allen - 02 Jul, 2025 - Comments: 0

Synopsys’ Shankar Krishnamoorthy chats with industry experts about how the combination of AI and software-defined systems is driving a re-evaluation of engineering workflows and why chip, software, and system development must evolve in unison. Siemens’ Jake Wiltgen considers the rapidly evolving and growing challenge of performing DFT verification as designs scale, with complex hierarchi... » read more

Mixed Messages Complicate Mixed-Signal
By Brian Bailey - 26 Jun, 2025 - Comments: 0

Several years ago, analog and mixed signal (AMS) content hit a wall. Its contribution to first-time chip failure doubled, and there is no evidence that anything has improved dramatically since then. Some see that the problem is likely to get worse due to issues associated with advanced nodes, while others see hope for improvement coming from AI or chiplets. Fig. 1: Cause of ASIC respins. S... » read more

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