Why Chips Are Getting Noisier


In the past, designers only had to worry about noise for sensitive analog portions of a design. Digital circuitry was immune. But while noise gets worse at newer process nodes, staying at 28nm does not mean that it can be ignored anymore. With Moore's Law slowing, designs have to do more with less. Margins are being squeezed, additional concurrency is added, and attempts are made to opti... » read more

Waiting For Chiplet Interfaces


There aren't many success stories related to chiplets today for a very simple reason—there are few standard interfaces defined for how to connect them. In fact, the only way to use them is to control both sides of the interface with a proprietary interface and protocol. The one exception is the definition of HBM2, which enables large quantities of third-party DRAM to be connected to a logi... » read more

Case Study—RF ASIC Validation Of A Satellite Transceiver


ASIC validation in the RF world comes with its own set of hurdles and challenges, with high-quality lab equipment, experience and know-how essential. A recently completed RF sub-system validation at S3 Semiconductors is presented in the form of a case study of the execution. The validation PCB design focussed on impedance matching and shielding RF signals from noise sources. We built up an effi... » read more

Data Confusion At The Edge


Disparities in pre-processing of data at the edge, coupled with a total lack of standardization, are raising questions about how that data will be prioritized and managed in AI and machine learning systems. Initially, the idea was that 5G would connect edge data to the cloud, where massive server farms would infer patterns from that data and send it back to the edge devices. But there is far... » read more

Crossover To Memory Expansion With Adesto EcoXiP and NXP’s i.MX RT Crossover Processors


The ‘Crossover Processor’ integrates attributes of a microprocessor such as higher CPU speeds, multimedia interfaces and expandable memory into a microcontroller form factor built for cost effectiveness and fastest development time. This new crossover processor class of device provides embedded developers the ability to solve many problems in today’s fast-moving technology markets. To ... » read more

Power/Performance Bits: Jan. 22


Efficient neural net training Researchers from the University of California San Diego and Adesto Technologies teamed up to improve neural network training efficiency with new hardware and algorithms that allow computation to be performed in memory. The team used an energy-efficient spiking neural network for implementing unsupervised learning in hardware. Spiking neural networks more closel... » read more

The Week In Review: Design


M&A IoT-focused memory chipmaker Adesto Technologies acquired S3 Semiconductors, a provider of mixed-signal and RF ASICs and IP. Based in Ireland, S3 Semiconductors was founded in 1986. S3 Semiconductors will become a business unit of Adesto and will continue to operate under its current model in the $35 million deal. S3 Semiconductor's parent company, S3 Group, will continue as a separate... » read more

The Numbers Game


Industry executives making presentations on the Internet of Things often cite the famous estimate by Cisco Systems – 25 billion connected devices in 2015 will double to 50 billion connected devices in 2020. Also, the worldwide IoT market will grow 21% a year to $7 trillion by the end of this decade, according to IDC. Billions and trillions are at stake. Many chip companies, especially I... » read more