tag: Advantest

Reliability Costs Becoming Harder To Track
By SE Staff - 08 Jun, 2021 - Comments: 0

Ensuring reliability in chips is becoming more complex and significantly more expensive, shifting left into the design cycle and right into the field. But those costs also are becoming more difficult to define and track, varying greatly from one design to the next based upon process node, package technology, market segment, and which fab or OSAT is used. As the number of options increases fo... » read more

Digging Much Deeper With Unit Retest
By Anne Meixner - 08 Jun, 2021 - Comments: 0

Keeping test costs flat in the face of product complexity continues to challenge both product and test engineers. Increased data collection at package-level test and the ability to respond to it in a never-before level of detail has prompted device makers and assembly and test houses to tighten up their retest processes. Test metrology, socket contamination, and mechanical alignment have alw... » read more

Hybrid System-Level Test For RF SiP
By Koji Miyauchi - 08 Jun, 2021 - Comments: 0

In recent years, the proliferation of the IoT has focused attention on low-power-wireless applications. IoT modules incorporating functions such as Bluetooth Low Energy (BLE) transceivers, MCUs, and power-management circuitry are becoming system-in-package (SiP) and even one-chip devices. Such devices increase the demand for a mass-production test environment that can measure them in a short ti... » read more

Week In Review: Auto, Security, Pervasive Computing
By SE Staff - 04 Jun, 2021 - Comments: 0

Pervasive computing — IoT, edge, cloud, data center, and back To simplify IoT workflows, Arm announced that it is putting parts of its Common Microcontroller Software Interface Standard (CMSIS) into an open project called Open-CMSIS-Pack. The CMSIS is a vendor-independent abstraction layer for MCUs, especially Arm Cortex-M processors, that makes it possible for developers to deal with softwa... » read more

Week In Review: Manufacturing, Test
By Mark LaPedus - 28 May, 2021 - Comments: 0

Government policy The U.S. government hopes to build more fabs and expand its R&D efforts in the United States. To help enable those efforts, U.S. Senate Majority Leader Charles Schumer has introduced the new bipartisan U.S. Innovation and Competition Act. This combines Schumer’s Endless Frontier Act and other bipartisan competitiveness bills. It includes $52 billion in emergency supplem... » read more

Managing Wafer Retest
By Anne Meixner - 19 May, 2021 - Comments: 1

Every wafer test touch-down requires a balance between a good electrical contact and preventing damage to the wafer and probe card. Done wrong, it can ruin a wafer and the customized probe card and result in poor yield, as well as failures in the field. Achieving this balance requires good wafer probing process procedures as well as monitoring of the resulting process parameters, much of it ... » read more

Week In Review: Manufacturing, Test
By Mark LaPedus - 14 May, 2021 - Comments: 0

Government policy Semiconductor companies as well hardware and software vendors have announced the formation of the Semiconductors in America Coalition (SIAC). The group called on congressional leaders to appropriate $50 billion for U.S. manufacturing incentives and research initiatives. SIAC’s mission is to advance federal policies that promote semiconductor manufacturing and research in th... » read more

Chip Monitoring And Test Collaborate
By Bryon Moyer - 11 May, 2021 - Comments: 0

As on-chip monitoring becomes more prevalent in complex advanced-node ICs, it’s easy to question whether or not it conflicts with conventional silicon testing. It might even supplant such testing in the future. Or alternatively, they could interact, with each supporting the other. “On-chip monitors provide fine-grained observability into effects and issues that are otherwise difficult or... » read more

Testing AiP Modules In High-Volume Production
By Jose Moreira - 11 May, 2021 - Comments: 0

Far-field and radiating near-field are two options for high-volume over-the-air (OTA) testing of antenna-in-package (AiP) modules with automated test equipment (ATE) [1]. In this article, we define an AiP device under test (DUT) and examine the measurement results from both methods. Creating an AiP evaluation vehicle Proper evaluation of an ATE OTA measurement setup requires an AiP module. Us... » read more

Testing Analog Circuits Becoming More Difficult
By SE Staff - 11 May, 2021 - Comments: 1

Foundries and packaging houses are wrestling how to control heat in the testing phase, particularly as devices continue to shrink and as thermally sensitive analog circuits are added into SoCs and advanced packages to support everything from RF to AI. The overriding problem is that heat can damage chips or devices under test. That's certainly true for digital chips developed at advanced node... » read more

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