tag: Agnisys

Heterogenous Integration Creating New IP Opportunities
By Brian Bailey - 19 Jul, 2022 - Comments: 0

The design IP market has long been known for constant change and evolution, but the industry trend toward heterogenous integration and chiplets is creating some new challenges and opportunities. Companies wanting to stake out a claim in this area have to be nimble, because there will be many potential standards introduced, and they are likely to change quickly as the industry explores what is r... » read more

AI-Powered Verification
By Brian Bailey - 01 Jun, 2022 - Comments: 1

With functional verification consuming more time and effort than design, the chip industry is looking at every possible way to make the verification process more effective and more efficient. Artificial intelligence (AI) and machine learning (ML) are being tested to see how big an impact they can have. While there is progress, it still appears to be just touching the periphery of the problem... » read more

Debug: The Schedule Killer
By Brian Bailey - 30 Jun, 2021 - Comments: 0

Debug often has been labeled the curse of management and schedules. It is considered unpredictable and often can happen close to the end of the development cycle, or even after – leading to frantic attempts at work-arounds. And the problem is growing. "Historically, about 40% of time is spent in debug, and that aspect is becoming more complex," says Vijay Chobisa, director of product manag... » read more

Blog Review: May 5
By Jesse Allen - 05 May, 2021 - Comments: 0

Arm's William Wang considers how to increase the performance and programmability of persistent applications through using battery to protect the on-chip volatile cache hierarchy. Cadence's Paul McLellan finds that ransomware is getting more sophisticated, and more difficult to eradicate and defend against, with potentially life-threatening consequences. Synopsys' Jonathan Knudsen digs int... » read more

Week In Review: Design, Low Power
By Jesse Allen - 17 Jul, 2020 - Comments: 0

Siemens will acquire Avatar Integrated Systems. The company's place-and-route tools, which will become part of Mentor's Xcelerator portfolio, include a netlist-to-GDS full-function block-level physical implementation tool and a complete top-level prototyping, floor-planning and chip assembly tool. Based in Santa Clara, CA, Avatar was formed in 2017 from the acquired assets of ATopTech. ATopTech... » read more

Week In Review: Design, Low Power
By Jesse Allen - 24 May, 2019 - Comments: 0

M&A Marvell will acquire Avera Semiconductor, the ASIC business of GlobalFoundries, for $650 million in cash at closing plus an additional $90 million in cash if certain business conditions are satisfied within the next 15 months. The agreements include transfer of Avera's revenue base, strategic design wins with infrastructure OEMs, and a new long-term wafer supply agreement between Globa... » read more

Blog Review: Feb. 20
By Jesse Allen - 20 Feb, 2019 - Comments: 0

Synopsys' Chirag Tyagi examines how Display Stream Compression 1.2 allows the commonly used MIPI DSI display interface to support 8k UHD displays in applications like infotainment and AR/VR even with the limited bandwidth of PHY layers. Cadence's Paul McLellan listens in on a panel discussion at DesignCon on how to create PDKs for silicon photonics so non-photonics experts can complete at le... » read more

Blog Review: Dec. 6
By Jesse Allen - 06 Dec, 2017 - Comments: 0

Synopsys' Eric Huang examines electromagnetic interference, the Bit Error Rate in USB 3.2 and how different transfer types handle errors. Mentor's Nitin Bhagwath points out several things that can cause DDR signals to behave badly, from excessive ringing to stubs in the channel. Cadence's Paul McLellan listens in as Oski CEO Vigyan Singhal explains the basics of assertion-based verificati... » read more

Blog Review: March 1
By Jesse Allen - 01 Mar, 2017 - Comments: 0

In a video, Mentor's Wally Rhines discusses the evolution of test methodologies and the forces that will change test priorities. Cadence's Priya Balasubramanian explores memory trends in data servers driven by the Internet's massive need for bandwidth. Synopsys' Aadil Trikha presents a primer on the types of AMBA ACE barrier transactions. ARM's Simon Segars examines the state of IoT de... » read more

Formal’s Roadmap
By Brian Bailey - 12 Dec, 2016 - Comments: 0

Formal verification has come a long way in the past five years as it focused on narrow tasks within the verification flow. Semiconductor Engineering sat down to discuss that progress, and the future of formal technologies, with [getperson id="11306" comment="Raik Brinkmann"], president and CEO of [getentity id="22395" e_name="OneSpin Solutions"]; Harry Foster, chief verification scientist at [g... » read more

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