A New Era Of Edge AI: E-Series GPU IP


Welcome to the Age of Parallel Compute The age of parallel compute has arrived. The emergence of artificial intelligence is having profound implications on hardware development in every single market. Data centres are being built with massive compute resources to handle the demands of training and connected inference. At the edge, embedded hardware system designers are dealing with the chal... » read more

AI Infrastructure: Optimized For Model Training


This white paper discusses the critical infrastructure needed for efficient AI model training, emphasizing the role of network capabilities in handling vast data flows and minimizing delays. It outlines challenges in model training and innovative solutions that can enhance performance. AI Revolution: The increasing complexity of AI applications, such as autonomous vehicles and personalized m... » read more

Future-proofing AI Models


Experts At The Table: Making sure AI accelerators can be updated for future requirements is becoming essential due to the rapid introduction of new models. Semiconductor Engineering sat down to discuss the challenges of future-proofing these designs with Marc Meunier, director of ecosystem development at Arm; Jason Lawley, director of product marketing for AI IP at Cadence; Paul Karazuba, vic... » read more

AI Accelerators Moving Out From Data Centers


Experts At The Table: The explosion in AI data is driving chipmakers to look beyond a single planar SoC. Semiconductor Engineering sat down to discuss the need for more computing and the expanding role of chiplets with Marc Meunier, director of ecosystem development at Arm; Jason Lawley, director of product marketing for AI IP at Cadence; Paul Karazuba, vice president of marketing at Expedera; ... » read more

Impact of AI On IP And Chip Design


By Global Semiconductor Alliance (GSA) In conjunction with the Global Semiconductor Alliance's IP Interest group, Expedera explores the impact of AI on intellectual property (IP) and Chip Design, providing comprehensive details and multifaceted data to cover all aspects of the semiconductor industry. It highlights AI growth trends, market predictions, and current silicon chip design innovati... » read more

GPU Analysis Identifying Performance Bottlenecks That Cause Throughput Plateaus In Large-Batch Inference


A new technical paper titled "Mind the Memory Gap: Unveiling GPU Bottlenecks in Large-Batch LLM Inference" was published by researchers at Barcelona Supercomputing Center, Universitat Politecnica de Catalunya, and IBM Research. Abstract "Large language models have been widely adopted across different tasks, but their auto-regressive generation nature often leads to inefficient resource util... » read more

Silicon Reimagined: New Foundations For The Age of AI


The semiconductor industry is undergoing a pivotal transformation driven by the rise of artificial intelligence (AI) and the slowing of traditional Moore’s Law scaling.  In this comprehensive 42 page report, several key trends shaping the industry’s future are highlighted. The push toward more specialized architectures tailored for specific workloads, particularly in AI. The critic... » read more

Application Of External CFD Modeling In Data Center Design


Rising IT densities and AI workloads demand smarter heat management and equipment placement. This paper "Application of External CFD Modeling in Data Center Design" explores how external computational fluid dynamics (CFD) modeling provides crucial insights by resolving airflow patterns around buildings. Why Choose External CFD Modeling? Recommended by The Green Grid, it helps predict: ... » read more

Workload-Specific Data Movements Across AI Workloads in Multi-Chiplet AI Accelerators


A new technical paper titled "Communication Characterization of AI Workloads for Large-scale Multi-chiplet Accelerators" was published by researchers at Universitat Politecnica de Catalunya. Abstract "Next-generation artificial intelligence (AI) workloads are posing challenges of scalability and robustness in terms of execution time due to their intrinsic evolving data-intensive characteris... » read more

Scheduling Multi-Model AI Workloads On Heterogeneous MCM Accelerators (UC Irvine)


A technical paper titled “SCAR: Scheduling Multi-Model AI Workloads on Heterogeneous Multi-Chiplet Module Accelerators” was published by researchers at University of California Irvine. Abstract: "Emerging multi-model workloads with heavy models like recent large language models significantly increased the compute and memory demands on hardware. To address such increasing demands, designin... » read more

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