Chip Design Is Getting Squishy

By Ed Sperling - 27 Feb, 2020 - Comments: 0

So many variables, uncertainties and new approaches are in play today across the chip industry today that previous rules are looking rather dated. In the past, a handful of large companies or organizations set the rules for the industry and established an industry roadmap. No such roadmap exists today. And while there are efforts underway to create new roadmaps for different industries, inte... » read more

Chiplet Momentum Rising

By Mark LaPedus - 26 Feb, 2020 - Comments: 0

The chiplet model is gaining momentum as an alternative to developing monolithic ASIC designs, which are becoming more complex and expensive at each node. Several companies and industry groups are rallying around the chiplet model, including AMD, Intel and TSMC. In addition, there is a new U.S. Department of Defense (DoD) initiative. The goal is to speed up time to market and reduce the cost... » read more

Week In Review: Auto, Security, Pervasive Computing

By Susan Rambo - 21 Feb, 2020 - Comments: 0

AI The European Union put out a white paper about artificial intelligence. The United States Chief Technology Officer Michael Kratsios criticized the EU stance on Thursday as clumsy. "We found, what they actually put out yesterday, really, I think, in some ways clumsily attempts to bucket AI-powered technologies as either ‘high-risk’ or ‘not high-risk,’” he said, according to a news ... » read more

Week In Review: Design, Low Power

By Jesse Allen - 21 Feb, 2020 - Comments: 0

Dialog Semiconductor will acquire Adesto Technologies for $12.55 per share in cash, or for approximately $500 million enterprise value. Founded in 2006 and based in Santa Clara, CA, Adesto provides application-specific semiconductors, embedded systems, and specialty memory for IoT and industrial IoT applications. “This acquisition substantially enhances our position in the Industrial IoT mark... » read more

EDA In The Cloud

By Ed Sperling - 18 Feb, 2020 - Comments: 0

Michael White, director of product marketing for Calibre physical verification at Mentor, a Siemens Business, looks at the growing compute requirements at 7, 5 and 3nm, why the cloud looks increasingly attractive from a security and capacity standpoint, and how the cloud as well as new lithography will affect the cost and complexity of developing new chips. » read more

Supercomputing Performance & Efficiency: An Exploration Of Recent History & Near-Term Projections

By Technical Paper Link - 28 Jan, 2020 - Comments: 0

Source: Koomey Analytics, in collaboration with AMD Jonathan Koomey*, Zachary Schmidt*, and Samuel Naffziger† * Koomey Analytics; †Advanced Micro Devices, Inc. A new paper analyzes data from the industry site Top 500 to evaluate the efficiency of supercomputers over the past decade. It also compares how the efficiency and performance of a recently announced supercomputer, schedul... » read more

Week In Review: Design, Low Power

By Jesse Allen - 01 Nov, 2019 - Comments: 0

Micron acquired FWDNXT, an AI software and hardware startup. Founded in 2017 and based in Lafayette, Indiana, FWDNXT, specializes in building machine learning deep neural network inference accelerators scalable from edge devices to server-class performance as Xilinx FPGAs, SoCs, or SDK. The company's engine already powers Micron's Deep Learning Accelerator (DLA) technology. “FWDNXT is an a... » read more

Week in Review – IoT, Security, Autos

By Jeff Dorsch - 11 Oct, 2019 - Comments: 0

Products/Services Arm TechCon got under way with a series of announcements. Arm is a founding member of the Autonomous Vehicle Computing Consortium, along with General Motors, Toyota Motor, DENSO, Continental, Bosch, NXP Semiconductors, and Nvidia. More information on the consortium is available here. “Imagine a world where vehicles are able to perceive their dynamically changing environment... » read more

Reducing Costly Flaws In Heterogeneous Designs

By Ed Sperling - 08 Oct, 2019 - Comments: 0

The cost of defects is rising as chipmakers begin adding multiple chips into a package, or multiple processor cores and memories on the same die. Put simply, one bad wire can spoil an entire system. Two main issues need to be solved to reduce the number of defects. The first is identifying the actual defect, which becomes more difficult as chips grow larger and more complex, and whenever chi... » read more

Open ISAs Gaining Traction

By Ann Mutschler - 26 Sep, 2019 - Comments: 0

Open instruction set architectures are starting to gain a foothold, often in combination with other processors, as chipmakers begin to add more specialized compute elements and more flexibility into their designs. There are a number of these open ISAs available today, including Power, MIPS, and RISC-V, and there are a number of permutations and tools available for sale based on those archite... » read more

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tag: AMD

Chip Design Is Getting Squishy

Chiplet Momentum Rising

Week In Review: Auto, Security, Pervasive Computing

Week In Review: Design, Low Power

EDA In The Cloud

Supercomputing Performance & Efficiency: An Exploration Of Recent History & Near-Term Projections

Week In Review: Design, Low Power

Week in Review – IoT, Security, Autos

Reducing Costly Flaws In Heterogeneous Designs

Open ISAs Gaining Traction