The Week In Review: Design


Tools Synopsys rolled out a hybrid verification platform, which it said can shave months off design time. The platform acts like a bridge between emulation, FPGA prototyping, simulation, static and formal verification and debug. Mentor Graphics uncorked a new version of its embedded hypervisor, which includes better system configuration, debugging and hardware support. The hypervisor is aim... » read more

The Week In Review: Design


Tools Open-Silicon uncorked a 28Gbps SerDes evaluation platform, complete with board, test chip and characterization data, which it says will speed up and simplify development of chips for 100G networks. The chip utilizes PHY IP from Semtech. IP Synopsys rolled out MIPI C-PHY verification IP that utilizes a three-phase coding technique for faster camera, display and SoC interfaces. http://... » read more

Plotting IBM Micro’s Future


It’s been a wild ride for IBM’s Microelectronics Group. Neither IBM, nor the other parties involved, have made any public comments about the recent events concerning IBM Micro. Much of the drama has played out in the media. Based on those reports, here’s a rough outline of the events. Not long ago, IBM put its loss-ridden chip unit on the block to shore up the company’s bottom lin... » read more

Server Memory: What Drives Its Growth?


I was recently reading several analyst reports that came out after the end of last quarter, and one caught my eye: "Gartner says Worldwide Server Shipments Grew 1.4%..." It caused me to wonder, how is it possible that server shipments only grow at modest rates, while the DRAM used in those servers is growing at significantly higher rates? Putting my search engine to use, I found a series of ... » read more

Why An IBM Sale Matters


The rumored sale of IBM’s semiconductor unit to GlobalFoundries could add some interesting capabilities for the foundry, including deep process technology and expertise. It also could have some far-reaching effects for the entire semiconductor industry. The reason revolves around ongoing U.S. government initiatives to improve visibility for components throughout its supply chain. IBM has b... » read more

The Week In Review: Manufacturing


In a much-anticipated deal, IBM is close to selling its chip unit to GlobalFoundries, according to Bloomberg. GlobalFoundries wants IBM’s engineers and the IP, and not the fabs. Intel lost its challenge against a record 1.06 billion euro ($1.44 billion) European Union fine handed down five years ago, according to Reuters. The EU said Intel tried to thwart AMD by giving rebates to PC makers... » read more

The Week In Review: Design


Tools Mentor Graphics rolled out embedded Linux software for AMD’s x86 G-series SoCs, code-named Steppe Eagle and its Crowned Eagle CPUs. Ansys-Apache and TowerJazz have created a power noise and reliability signoff design kit, including reference flow guidelines, test case examples and flow setup guidance. Synopsys updated its verification portfolio with static and formal tools for CD... » read more

Executive Insight: Simon Segars


SE: What concerns you most? Segars: In the context of design and where chip design is going, ARM is a long-term business. We’re doing stuff now that is going to ship in five years’ time. Obviously, for everyone in this space, Moore’s Law has been a fantastic thing. It’s enabled us to achieve really fantastic scaling of transistors, and everyone knows that is getting harder and harder... » read more

The Week In Review: Design


M&A Mentor Graphics acquired Nimbic, which makes simulation software for power and signal integrity and electromagnetic interference. No purchase price was given. Synopsys’ Coverity subsidiary acquired Kalistick, which makes cloud-based software solutions to boost test efficiency. Terms of the deal were not provided. Tools and IP Sonics introduced a new development environment for... » read more

Improving LP Verification Efficiency


The addition of low power circuitry can create so many corner cases that many can escape even the best-written testbenches. This has driven the need for so many additional verification cycles to be run that there must be many datacenter managers at semiconductor companies wondering if it is a trick by the power companies to cause an equal amount of power to be consumed by low-power verification... » read more

← Older posts Newer posts →