Mechanical Challenges Rise With Heterogeneous Integration

By Ed Sperling - 03 Apr, 2023 - Comments: 0

Companies integrating multiple chips or chiplets into a package will need to address structural and other mechanical engineering issues, but gaps in the design tools, new materials and interconnect technologies, and a shortage of expertise are making it difficult to address those issues. Throughout most of the history of the semiconductors, few people outside of foundries worried about struc... » read more

Week In Review: Design, Low Power

By Susan Rambo - 31 Mar, 2023 - Comments: 0

Synopsys rolled out an AI-driven design suite called Synopsys.ai at the Synopsys User Group conference this week, which it says reduces time to better results at multiple points in the design flow. The company noted the new technology uses reinforcement learning, which compensates for relatively small data sets by allowing engineers to interact with that data more easily at any point, and to ch... » read more

Big Changes Ahead In Power Delivery, Materials, And Interconnects

By Laura Peters - 22 Mar, 2023 - Comments: 0

Part one of this forecast looked at evolving transistor architectures and lithography platforms. This report examines revolutions in interconnects and packaging. When it comes to device interconnects, it’s hard to beat copper. Its low resistivity and high reliability have served the industry exceedingly well as both on-chip interconnect and wires between chips. But in logic chips, with int... » read more

Mini-Consortia Forming Around Chiplets

By Ed Sperling - 20 Mar, 2023 - Comments: 0

Mini-consortia for chiplets are sprouting up across the industry, driven by demands for increasing customization in tight market windows and fueled by combinations of hardened IP that have been proven in silicon. These loosely aligned partnerships are working to develop LEGO-like integration models for highly specific applications and end markets. But they all are starting small, because it'... » read more

Tech Forecast: Fab Processes To Watch Through 2040

By Laura Peters - 16 Mar, 2023 - Comments: 0

The massive proliferation of semiconductors in more markets, and more applications within those markets, is expected to propel the industry to more than $1 trillion by 2030. But over the next 17 years, semiconductors will reach well beyond the numbers, changing the way people work, how they communicate, and how they measure and monitor their health and well-being. Chips will be the enabling ... » read more

Panel Tackles Chiplet Packaging Challenges

By QP Technologies Staff - 16 Mar, 2023 - Comments: 1

QP Technologies recently exhibited at the first Chiplet Summit, held January 24-26 in San Jose, California. Dick Otte, CEO of our parent company Promex Industries, participated on a panel titled “Best Packaging for Chiplets Today.” Moderated by Nobuki Islam with JCET Group, the packaging panel also included Daniel Lambalot, Alphawave Semi; Laura Mirkarimi, Adeia; Syrus Ziai, Eliyan; and Mik... » read more

Week In Review: Semiconductor Manufacturing & Test

By Gregory Haley - 17 Feb, 2023 - Comments: 0

The Biden Administration’s export bans for semiconductor manufacturing equipment are delaying expansion plans for Chinese chipmakers, Nikkei Asia reports. Yangtze Memory Technologies (YMTC) has halted work on its second memory plant near Wuhan, and ChangXin Memory Technologies (CMTX) says its second production facility, slated to open in 2023, will be delayed until 2024 or 2025. In an effo... » read more

How AiP/AoP Technology Helps Enable 5G And More

By Brendan Wells - 16 Feb, 2023 - Comments: 0

For 5G smartphones and other millimeter wave (mmWave) applications, antenna integration off the board and into the package, simplifies the design challenges endemic to high-frequency devices. These challenges include signal loss, signal integrity, and power supply limitation. Antenna in Package (AiP) and Antenna on Package (AoP) constructions provide the required form, fit and function for high... » read more

The Path To Known Good Interconnects

By Laura Peters - 19 Jan, 2023 - Comments: 1

Chiplets and heterogenous integration (HI) provide a compelling way to continue delivering improvements in performance, power, area, and cost (PPAC) as Moore’s Law slows, but choosing the best way to connect these devices so they behave in consistent and predictable ways is becoming a challenge as the number of options continues to grow. More possibilities also bring more potential interac... » read more

Meeting Cost And Technology Requirements Using MLF/QFN

By Amkor - 14 Dec, 2022 - Comments: 0

MicroLeadFrame (MLF)/ quad flat no-lead (QFN) packaging technology is the fastest growing IC packaging solution today. From a market segment perspective, MLF packaging solutions represent more than a 111B-unit market for 2022 across five markets: automotive, consumer, industrial, networking, and communications (Figure 1). The package solution requirements across these markets vary but, the fund... » read more

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Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?