Week In Review: Design, Low Power


Arm announced its new roadmap promising 30% annual system performance gains on leading edge nodes through 2021. These gains are to come from a combination of microarchitecture design to hardware, software and tools. They are branding this new roadmap 'Neoverse.' The first delivery will be Ares – expected in early 2019 – for a 7nm IP platform targeting 5G networks and next-generation cloud t... » read more

The Chiplet Race Begins


Momentum is building for the development of advanced packages and systems using so-called chiplets, but the technology faces some challenges in the market. A group led by DARPA, as well as Marvell, zGlue and others are pursuing chiplet technology, which is a different way of integrating multiple dies in a package or system. In fact, the Defense Advanced Research Projects Agency (DARPA), part... » read more

The Week In Review: Design


M&A Microchip inked an agreement to acquire Microsemi, provider of chips for defense and aerospace, for $68.78 per share in cash. The acquisition price represents a total equity value of about $8.35 billion and a total enterprise value of about $10.15 billion, according to Microchip. The deal is expected to close in the second quarter of 2018. Silvaco acquired NanGate. Founded in 2004, ... » read more

Manufacturing Bits: Jan. 30


SRC’s new R&D centers The Semiconductor Research Corp. has launched a network of research centers within its recently-announced Joint University Microelectronics Program (JUMP). SRC officially launched the 5-year, $200 million program on Jan. 1. With various research centers, the mission of JUMP is to lay the groundwork that extends the viability of Moore’s Law through 2040. The idea is... » read more

IoT’s Many Different Forms


The Internet of Things is settling into widespread industrial applications, along with precision agriculture, while consumer IoT continues to find its way into the home through smart speakers and their digital assistants, such as Amazon Echo, Apple HomeKit, and Google Home. The Internet of Cows and the Internet of Tomatoes may sound like fanciful subjects, yet there is serious technology in ... » read more

How To Use CFD To Test And Analyze A Chip Package


By Prasad Tota and Robert Day Throughout the electronics industry, submicron feature size at the die level are driving package component sizes down to the design-rule level of the early technologies. Today’s integrated circuit (IC) package technology must deliver higher lead counts, reduced lead pitch, minimum footprint area, and significant volume reduction, which has led to semiconductor... » read more

The Week in Review: IoT


Market Research International Data Corp. (IDC) forecasts the worldwide Internet of Things market will double from $625.2 billion in 2015 to $1.29 trillion in 2020 for a compound annual growth rate of 15.6%. Aeris collaborated with IDC on its report, which predicts the installed base of IoT endpoints will increase from 12.1 billion at the end of 2015 to more than 30 billion by 2020. Initiati... » read more

Flexible Devices Drive New IoT Apps


Printed and flexible electronics are becoming almost synonymous with many emerging applications in the IoT, and as the technologies progress so do the markets that rely on those technologies. Flexible [getkc id="187" kc_name="sensors"] factor into a number of [getkc id="76" kc_name="IoT"] use cases such as agriculture, health care, and structural health monitoring. Other types of flexible de... » read more

Automotive’s Unsung Technology


Sound systems are becoming a critical design element in vehicles, and not just for music. Thanks to evolving technology, automotive audio has reached a point where it is taking on a much broader role for applications both within and outside the vehicle. Most people associate automotive audio with the car radio, which has been a fixture in cars for decades. But in the future, these systems al... » read more

The Week In Review: Design


Tools Startup Austemper Design unveiled a functional safety tool suite that includes safety analysis that applies default values from industry standards ISO26262 and/or IEC61508 for Failures-in-Time (FIT) rates, tools to handle safety synthesis and augment design structures, and a parallel fault simulator with hybrid simulation capabilities. SystemVerilog and VHDL parsers from Verific serve ... » read more

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