tag: Andes Technology

Chip Industry Week In Review
By The SE Staff - 31 May, 2024 - Comments: 0

JEDEC and the Open Compute Project rolled out a new set of guidelines for standardizing chiplet characterization details, such as thermal properties, physical and mechanical requirements, and behavior specs. Those details have been a sticking point for commercial chiplets, because without them it's not possible to choose the best chiplet for a particular application or workload. The guidelines ... » read more

Chip Industry Week In Review
By The SE Staff - 24 May, 2024 - Comments: 0

Absolics, an affiliate of Korea materials company SKC, will receive up to $75 million in direct funding under the U.S. CHIPS Act for the construction of a 120,000 square-foot facility in Covington, Georgia, for glass substrates in advanced packaging. imec will host a €2.5 billion (~$2.72B) pilot line for researching chips beyond 2nm, partially funded through the EU Chips Act. imec CEO Luc ... » read more

Week In Review: Design, Low Power
By Jesse Allen - 02 Jun, 2023 - Comments: 0

Arm debuted its latest platform for mobile computing. Arm Total Compute Solutions 2023 adds the new Immortalis-G720 GPU based on the 5th Generation GPU architecture, which redefines parts of the graphics pipeline to reduce memory bandwidth for the next generation of high geometry games and real-time 3D applications. The company also added two new Mali GPUs. In addition, Arm introduced a cluster... » read more

Week In Review: Design, Low Power
By Jesse Allen - 16 Dec, 2022 - Comments: 0

Power always has been a function of cost. The more power required, the more it costs to run a device, both in dollars and carbon footprint. This makes the breakthrough in fusion ignition at Lawrence Livermore National Laboratory all the more noteworthy, and one that could have significant implications for the future of computing, from data centers to rechargeable batteries in automobiles, robot... » read more

Week In Review: Design, Low Power
By Marie C. Baca - 02 Dec, 2022 - Comments: 0

Tools and IP Renesas released a family of configurable clock generators with an internal crystal oscillator for PCIe and networking applications in high-end computing, wired infrastructure and data center equipment. “Timing needs can vary greatly between different applications and equipment, and often change during a product design cycle,” said Zaher Baidas, Vice President of the Timing Pr... » read more

Week In Review: Design, Low Power
By Jesse Allen - 16 Sep, 2022 - Comments: 0

Cadence unveiled a big data analytics infrastructure to unify massive data sets across all Cadence computational software. The Joint Enterprise Data and AI (JedAI) Platform aims to optimize multiple runs of multiple engines across an entire SoC design and verification flow. It combines data from its AI-driven Cerebrus implementation and Optimality system optimization solutions, along with the n... » read more

Data Center Architectures In Flux
By Ann Mutschler - 24 Feb, 2022 - Comments: 0

Data center architectures are becoming increasingly customized and heterogeneous, shifting from processors made by a single vendor to a mix of processors and accelerators made by multiple vendors — including system companies' own design teams. Hyperscaler data centers have been migrating toward increasingly heterogeneous architectures for the past half decade or so, spurred by the rising c... » read more

Week In Review: Design, Low Power
By Jesse Allen - 03 Dec, 2021 - Comments: 0

Infineon Technologies acquired Syntronixs Asia, which specializes in precision electroplating, a key process in the assembly process of semiconductors. Syntronixs Asia has a workforce of more than 500 people and has been a major service provider for Infineon since 2009. “Through this acquisition, we have made another important step to strengthen the resilience of our supply chain,” said Tho... » read more

Week In Review: Design, Low Power
By Jesse Allen - 16 Jul, 2021 - Comments: 0

Tools Andes Technology certified Imperas reference models for the complete range of Andes IP cores with the new RISC-V P SIMD/DSP extension. The reference models can be used to evaluate multicore design configuration options for SoC architecture exploration and support early software development before silicon prototypes are available. Cadence's digital full flow was optimized and certified... » read more

Week In Review: Design, Low Power
By Jesse Allen - 11 Jun, 2021 - Comments: 0

Siemens Digital Industries Software acquired Pro Design's proFPGA product family of FPGA desktop prototyping technologies. Through a prior OEM relationship, proFPGA technology is already part of the Xcelerator portfolio; Siemens noted that the acquisition will allow for fuller integration with its Veloce hardware-assisted verification system. Pro Design will continue to operate as an independen... » read more

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