Blog Review: Jan. 10


Keysight’s Jenn Mullen explains how ChatGPT’s tools can help quality assurance (QA) engineers and software testers overcome test automation debt, and become more productive and able to deliver consistently high-quality products to market faster. Siemens’ Keith Felton discusses how the paradigm of “shift-left” power delivery analysis has emerged as a critical methodology in addressi... » read more

A Solver Combination Strategy For Photonic Integrated Components


With the increasing demand for optical bandwidth, photonic integrated circuit (PIC) technology is undergoing a growth rate very similar to the one seen by electronic integrated circuits over the last half-century. To keep up with the increasing number of components and circuit complexity, efficient and reliable automated design tools are necessary to carry out virtual prototyping, improve yield... » read more

Chip Industry Week In Review


By Susan Rambo, Jesse Allen, and Liz Allan The U.S. government will provide about $162 million in federal incentives, under the CHIPS and Science Act, to help Microchip onshore its semiconductor supply chain. The move is aimed at securing a reliable domestic supply of MCUs and mature-node chips. “Today’s announcement will help propel semiconductor manufacturing projects in Colorado and O... » read more

Money Pours Into New Fabs And Facilities


Fabs, packaging, test and assembly, and R&D all drew major funding in 2023. Companies poured money into offshore locations, such as India and Malaysia, to access a larger workforce and lower costs, while also partnering with governments to secure domestic supply chains amid ongoing geopolitical turmoil. Looking ahead, artificial intelligence (AI), quantum computing, and data applications... » read more

Blog Review: Jan. 3


Siemens' Stephen Ferguson looks at the history of computer aided engineering through the lens of how humans interact with computers, with each development enabling a step change in engineering productivity, and the new era on the horizon. Cadence's Krunal Patel finds that the security of data transmission can be improved by integrating Ethernet with Internet Protocol Security (IPSec), which ... » read more

Analog Design Complicates Voltage Droop


Experts at the Table: Semiconductor Engineering sat down to talk about voltage droop in analog and mixed-signal designs, and the need for multi-vendor tool interoperability and more precision, with Bill Mullen, distinguished engineer at Ansys; Rajat Chaudhry, product management group director at Cadence; Heidi Barnes, senior applications engineer at Keysight; Venkatesh Santhanagopalan, product ... » read more

Chip Industry Week In Review


By Jesse Allen, Karen Heyman, and Liz Allan More than 1 billion generative AI smartphones are expected be shipped during 2024 to 2027, reports Counterpoint. The share of GenAI smartphones will be 4% of the market in 2023 and is likely to double in 2024, with Samsung capturing half the market, followed by Chinese OEMs. By 2027, GenAI smartphones could account for 40% of the market. Global ... » read more

2023: A Good Year For Semiconductors


Looking back, 2023 has had more than its fair share of surprises, but who were the winners and losers? The good news is that by the end of the year, almost everyone was happy. That is not how we exited 2022, where there was overcapacity, inventories had built up in many parts of the industry, and few sectors — apart from data centers — were seeing much growth. The supposed new leaders we... » read more

Blog Review: Dec. 20


Siemens' Huw Geddes finds that the flexibility offered by the RISC-V ISA can introduce further verification and validation requirements to ensure that the combination of extensions and customization not just works but does not break anything else while delivering expected performance, plus looks at how processor trace can help. Cadence's Gustavo Araujo explains the various optimizations in t... » read more

Using Real Workloads To Assess Thermal Impacts


Thermal analysis is being driven much further left in the design, fueled by demand for increased transistor density and more features on a chip or in a package, as well as the unique ways the various components may be exercised or stressed. However, getting a clear picture of the thermal activity in advanced-node chips and packages is extremely complex, and it can vary significantly by use c... » read more

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