AI Adoption Slow For Design Tools


A lot of excitement, and a fair amount of hype, surrounds what artificial intelligence (AI) can do for the EDA industry. But many challenges must be overcome before AI can start designing, verifying, and implementing chips for us. Should AI replace the algorithms in use today, or does it have a different role to play? At the end of the day, AI is a technique that has strengths and weaknesses... » read more

Week In Review: Semiconductor Manufacturing, Test


The U.S. Commerce Department  launched Chips.gov, a website that covers all aspects of the CHIPS Act, including funding opportunities and job openings. In similar vein, Intel CEO Pat Gelsinger focused on the future of semiconductor manufacturing in America in a talk at MIT. Intel has committed to expanding semiconductor manufacturing in the U.S., including spending an initial $20 billion on ne... » read more

Week In Review: Design, Low Power


The National Institute of Standards and Technology (NIST) outlined its plan for a National Semiconductor Technology Center (NSTC) to be created using a share of the $11 billion in funds from the CHIPS Act marked for research and development. While a large portion of the CHIPS Act investment is set to boost U.S. fabs and manufacturing capabilities, the NSTC aims to also support the design side, ... » read more

Week In Review: Auto, Security, Pervasive Computing


Pervasive computing Renesas introduced a narrowband Internet of Things (NB-IoT) chipset and dev kit for the Indian market. The LTE NB-IoT modem chipset, the RH1NS200, was designed for Indian telecommunications carriers by targeting bands 1,3, 5 and 8 and by following India’s carrier-approved LTE protocol stack and software suite. Low power usage is built in — it has a low Power Saving Mode... » read more

EDA Makes A Frenzied Push Into Machine Learning


Machine learning is becoming a competitive prerequisite for the EDA industry. Big chipmakers are endorsing and demanding it, and most EDA companies are deploying it for one or more steps in the design flow, with plans to add much more over time. In recent weeks, the three largest EDA vendors have made sweeping announcements about incorporating ML into their tools at their respective user eve... » read more

True 3D-IC Problems


Placing logic on logic may sound like a small step, but several problems must be overcome to make it a reality. True 3D involves wafers stacked on top of each other in a highly integrated manner. This is very different from 2.5D integration, where logic is placed side-by-side, connected by an interposer. And there are some intermediate solutions today where significant memory is stacked on l... » read more

Blog Review: April 26


Codasip's Tora Fridholm introduces the NimbleAI project, an effort to design a neuromorphic sensing and processing 3D integrated chip that implements an always-on sensing stage, highly specialized event-driven processing kernels and neural networks to perform visual inference of selected stimuli using the bare minimum amount of energy. Synopsys' Anjaneya Thakar discusses computational lithog... » read more

Week In Review: Design, Low Power


Cadence rolled out a slew of new products at this week’s CDNLive Silicon Valley, including: A new generative AI-powered tool for analog, mixed-signal, RF and photonics design; An extended collaboration with TSMC and Microsoft to advance giga-scale physical verification system in the cloud; A multi-year partnership with the San Francisco 49ers football organization, focused on sust... » read more

Week In Review: Auto, Security, Pervasive Computing


Pervasive computing Broadcom announced delivery of its Jericho3-AI fabric for artificial intelligence (AI) networks, which delivers 26 petabits per second of Ethernet bandwidth. That is roughly four times the bandwidth of the previous generation, at a 40% power savings per gigabit. AMD released the Ryzen Embedded 5000 Series processors for customers requiring power-efficient processors opt... » read more

Blog Review: April 19


Synopsys' Soren Smidstrup and Kerim Genc explore how materials modeling helps battery designers explore the wide playing field for new battery materials and optimize performance by co-designing the structure and chemistry of new batteries, ultimately shortening development time and cost. Siemens' Stephen Chavez finds that enabling multiple engineers to work simultaneously within the same PCB... » read more

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