tag: ANSYS

Challenges In Reducing Wireless Latency
By Karen Heyman - 10 Oct, 2024 - Comments: 0

A new and much faster version of Wi-Fi is beginning to infiltrate the IoT market, reducing latency that has begun to creep up as more data is generated, processed, and moved wirelessly from one device to another. An estimated 20 billion connected devices are currently in use. Over the next several years, devices will start to include faster wireless connectivity, enabling more rapid transfer... » read more

Managing Legacy In Automotive
By Ann Mutschler - 10 Oct, 2024 - Comments: 0

Experts At The Table: The automotive ecosystem is in the midst of an intense evolution as OEMs and tiered providers grapple with how to deal with legacy technology while incorporating ever-increasing levels of autonomy, electrification, software defined vehicle concepts, just to name a few. Semiconductor Engineering sat down to discuss these and other related issues with Wayne Lyons, senior dir... » read more

The Cost Of EDA Data Storage And Processing Efficiency
By Adam Kovac - 09 Oct, 2024 - Comments: 0

Engineering teams are turning to the cloud to process and store increasing amounts of EDA data, but while the compute resources in hyperscale data centers are virtually unlimited, the move can add costs, slow access to data, and raise new concerns about sustainability. For complex chip designs, the elasticity of the cloud is a huge bonus. With advanced-node chips and packaging, the amount of... » read more

Blog Review: Oct. 9
By Liz Allan - 09 Oct, 2024 - Comments: 0

Siemens’ Stephen Chavez looks at the key benefits and challenges to achieving a successful ECAD-MCAD collaboration. Cadence’s Nayan Gaywala shares the AXI4 locking mechanism when implementing an Xtensa LX-based multi-core system on a Xilinx FPGA platform, using a dual-core design mapped to a KC705 platform as an example. Synopsys’ Vincent van der Leest digs into SRAM PUFs and their ... » read more

Chip Industry Week In Review
By The SE Staff - 04 Oct, 2024 - Comments: 0

Amkor will provide turnkey advanced packaging and test services to TSMC in Amkor's planned facility in Peoria, Arizona, in a deal announced on Thursday. The companies jointly specified the packaging technologies, such as TSMC’s Integrated Fan-Out (InFO) and Chip on Wafer on Substrate (CoWoS). President Biden signed into law a bill that exempts some semiconductor projects funded by the U.S.... » read more

TSMC’s Plan For Closing The Communication Gap
By Barry Pangrle - 03 Oct, 2024 - Comments: 0

TSMC held its North American Open Innovation Platform (OIP) Ecosystem Forum at the Santa Clara County Convention Center on Sept. 25, providing a quick roadmap update and to recognize its partners for all the collaborative work needed to keep the TSMC innovation train rolling and enabling its customers to utilize the latest technologies. L.C. Lu, TSMC fellow and vice president of R&D, sai... » read more

Chip Industry Week In Review
By The SE Staff - 27 Sep, 2024 - Comments: 0

Global spending on 300mm fab equipment is expected to reach a record US$400 billion from 2025 to 2027, according to SEMI. Key drivers are the regionalization of semiconductor fabs and the increasing demand for AI chips in data centers and edge devices, with China, South Korea, and Taiwan leading the way. The Biden-Harris Administration launched the National Semiconductor Technology Center’... » read more

Blog Review: Sept. 25
By Jesse Allen - 25 Sep, 2024 - Comments: 0

Cadence’s Mamta Rana digs into how PCIe 6.1 ECN builds on the FLIT-based architecture introduced in PCIe 6.0, further optimizing flow control mechanisms to handle increased data rates and improved efficiency but making verification of shared credit updates essential. Siemens’ Nicolae Tusinschi provides a primer on formal verification, including what makes it different from simulation, pr... » read more

How Die Dimensions Challenge Assembly Processes
By Anne Meixner - 19 Sep, 2024 - Comments: 1

Multi-die assemblies are becoming more common and more complex due to technology advancements and market demands, but differing die dimensions are making this process increasingly challenging. To fully enable a multi-chiplet ecosystem, standardized component handling and interfaces are needed. The underlying concept is similar to LEGO blocks that simply snap together, yet it's nowhere near t... » read more

Blog Review: Sept. 18
By Jesse Allen - 18 Sep, 2024 - Comments: 0

Siemens’ Kyle Fraunfelter explores the similarities between hurricane forecasting and semiconductor manufacturing to argue for the value of integrating real-time wafer fabrication measurements into the digital twin models used to simulate the semiconductor fabrication process. Cadence’s Rohini Kollipara introduces Display Stream Compression (DSC), which can enable higher resolutions and ... » read more

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