Electronics Reliability In Space: Simulating Rad Hard Designs


Space is a harsh environment. There’s no breathable air, radiation levels are 15 times higher than on Earth, and the approximate temperature is 2.7 Kelvin (minus 270.45 degrees Celsius or minus 454.81 degrees Fahrenheit). Thankfully, Earth’s atmosphere does a great job protecting us from space’s intense climate. But because there is no atmosphere in space, there’s nothing to protect sat... » read more

3D-IC Ecosystem Starts To Take Form


The adoption of chiplets is inevitable, but exactly when a mass migration toward this design approach will begin is yet to be determined. Nevertheless, some of the biggest technological and business-related barriers are being addressed. And while a chiplet-based design remains beyond the economic reach of many companies today, that is starting to change. Early signs of an emerging ecosystem ... » read more

Discovering Digital Twins: A Complete Guide


As artificial intelligence (AI) and machine learning (ML) continue to revolutionize industries, their integration with simulation is amplifying the capabilities of digital twins. AI/ML, simulation, and reduced-order modeling (ROM) technologies combine to create hybrid digital twins—virtual replicas that blend data-driven insights with the accuracy of physics-based models. This powerful approa... » read more

Chip Industry Week In Review


Check out our new Inside Chips podcast. President Trump’s ‘Liberation Day’ tariffs were announced this week. The executive order stated that semiconductors and copper imports are not directly subject to the reciprocal tariff, although the exemption may be short-lived. Semiconductor equipment and tools were not mentioned, leaving the industry searching for clarification. Regardless, hig... » read more

Auto Sector Leads The Way In IC Security


Concerns about chip and system security are beginning to bear fruit in some markets, driven by the overlap in safety and security in automotive applications and the growing value of algorithms and complex systems in others. But how and when that security is implemented is still all over the map, and so is its effectiveness. The reasons are as nuanced as the designs themselves, which makes it... » read more

Stakes Are High For Aerospace, Defense IC Designs


Chips destined for the skies or armed forces need extra everything. They require higher layers of abstraction to simulate all the moving parts in the field, high-reliability testing for harsh environments, in addition to system-level test. They also need radiation-hardening and ceramic materials for space, extra safety layers, and advanced security techniques. As in the automotive sector, th... » read more

Blog Review: Apr. 2


Synopsys’ Meenakshy Ramachandran explores how DisplayPort Automotive Extensions help meet functional safety and security standards for the increasingly higher-resolution and more immersive in-vehicle displays in connected, autonomous, shared, and electric vehicles. Siemens’ Gabriella Leone and Michael Munsey discuss the need for a collaborative semiconductor business platform and how to ... » read more

Chip Industry Week In Review


McKinsey issued a new report on the state of the chemical supply chain for semiconductors in the U.S., citing potential shortages of high-purity materials such as tungsten, aluminum and copper, lack of access to CMP slurries and photoresists for EUV, and rising competition for high-k precursors that can fetch higher prices outside of the U.S. CSIS weighed in on the U.S. goverment's recent ... » read more

Blog Review: Mar. 26


Siemens' Bianca Ward argues that sustainability must be considered starting from the design phase to reduce the energy consumption of ICs as well as the production processes used to manufacture them. Synopsys' Adrien Tozzoli looks at how physical optics simulation can be improved by using beam synthesis propagation, a method that decomposes the optical field into a collection of beamlets to ... » read more

Defect Analysis and Testing Framework For FOWLP Interconnects


A new technical paper titled "Defect Analysis and Built-In-Self-Test for Chiplet Interconnects in Fan-out Wafer-Level Packaging" was published by researchers at Arizona State University. Abstract "Fan-out wafer-level packaging (FOWLP) addresses the demand for higher interconnect densities by offering reduced form factor, improved signal integrity, and enhanced performance. However, FOWLP fa... » read more

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