Chip Ecosystem Apprenticeships Help Close The Talent Gap

By Liz Allan - 12 Feb, 2024 - Comments: 1

Competency-based apprenticeship programs are gaining wider acceptance across the chip industry as companies and governments look for new ways to address talent shortages, and as workers look for new skills that can span multiple industry sectors and industries. Funded in part by the CHIPS Act in the U.S. the European Chips Act, and various other nation-specific and regional programs, apprent... » read more

Chip Industry Week In Review

By The SE Staff - 02 Feb, 2024 - Comments: 0

By Jesse Allen, Gregory Haley, and Liz Allan. Cadence introduced an AI-based thermal stress and analysis platform aimed at 2.5D and 3D-ICs, and cooling for PCBs and electronic assemblies. The company also debuted a HW/SW accelerated digital twin solution for multi-physics system design and analysis, combining GPU-resident computational fluid dynamics (CFD) solvers with dedicated GPU hardwar... » read more

Chip Industry Week In Review

By The SE Staff - 12 Jan, 2024 - Comments: 0

By Jesse Allen, Karen Heyman, and Liz Allan Renesas will acquire Transphorm, which designs and manufactures gallium nitride power devices, for about $339 million. GaN, which is a wide-bandgap technology, is used for high-voltage applications in a slew of markets, including EVs and EV fast chargers, as well as data centers and industrial applications. Cadence acquired Invecas, a provider o... » read more

Money Pours Into New Fabs And Facilities

By Liz Allan - 03 Jan, 2024 - Comments: 0

Fabs, packaging, test and assembly, and R&D all drew major funding in 2023. Companies poured money into offshore locations, such as India and Malaysia, to access a larger workforce and lower costs, while also partnering with governments to secure domestic supply chains amid ongoing geopolitical turmoil. Looking ahead, artificial intelligence (AI), quantum computing, and data applications... » read more

Fabs Begin Ramping Up Machine Learning

By Anne Meixner - 19 Dec, 2023 - Comments: 0

Fabs are beginning to deploy machine learning models to drill deep into complex processes, leveraging both vast compute power and significant advances in ML. All of this is necessary as dimensions shrink and complexity increases with new materials and structures, processes, and packaging options, and as demand for reliability increases. Building robust models requires training the algorithms... » read more

Modeling Compute In Memory With Biological Efficiency

By Katherine Derbyshire - 19 Dec, 2023 - Comments: 0

The growing popularity of generative AI, which uses natural language to help users make sense of unstructured data, is forcing sweeping changes in how compute resources are designed and deployed. In a panel discussion on artificial intelligence at last week’s IEEE Electron Device Meeting, IBM’s Nicole Saulnier described it as a major breakthrough that should allow AI tools to assist huma... » read more

Chip Industry Week In Review

By The SE Staff - 15 Dec, 2023 - Comments: 0

By Jesse Allen, Gregory Haley, and Liz Allan Synopsys acquired Imperas, pushing further into the RISC-V world with Imperas' virtual platform technology for verifying and emulating processors. Synopsys has been building up its RISC-V portfolio, starting with ARC-V processor IP and a full suite of tools introduced last month. The first high-NA EUV R&D center in the U.S. will be built at... » read more

Chip Industry Week In Review

By The SE Staff - 17 Nov, 2023 - Comments: 0

By Jesse Allen, Karen Heyman, and Liz Allan Japan's Rapidus and the University of Tokyo are teaming up with France's Leti to meet its previously announced mass production goal of 2nm chips by 2027, and chips in the 1nm range in the 2030s. Rapidus was formed in 2022 with the support of eight Japanese companies — Sony, Kioxia, Denso, NEC, NTT, SoftBank, Toyota, and Mitsubishi's banking arm, ... » read more

New Insights Into IC Process Defectivity

By Laura Peters - 07 Nov, 2023 - Comments: 1

Finding critical defects in manufacturing is becoming more difficult due to tighter design margins, new processes, and shorter process windows. Process marginality and parametric outliers used to be problematic at each new node, but now they are persistent problems at several nodes and in advanced packaging, where there may be a mix of different technologies. In addition, there are more proc... » read more

Gearing Up For Hybrid Bonding

By Laura Peters - 23 Oct, 2023 - Comments: 2

Hybrid bonding is becoming the preferred approach to making heterogeneous integration work, as the semiconductor industry shifts its focus from 2D scaling to 3D scaling. By stacking chiplets vertically in direct wafer-to-wafer bonds, chipmakers can leapfrog attainable interconnection pitch from 35µm in copper micro-bumps to 10µm or less. That reduces signal delay to negligible levels and e... » read more

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Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

by Bryon Moyer

tag: Applied Materials

Chip Ecosystem Apprenticeships Help Close The Talent Gap

Chip Industry Week In Review

Chip Industry Week In Review

Money Pours Into New Fabs And Facilities

Fabs Begin Ramping Up Machine Learning

Modeling Compute In Memory With Biological Efficiency

Chip Industry Week In Review

Chip Industry Week In Review

New Insights Into IC Process Defectivity

Gearing Up For Hybrid Bonding