Making Connections In 3D Heterogeneous Integration

By Ann Mutschler - 26 Oct, 2023 - Comments: 0

Activity around 3D heterogeneous integration (3DHI) is heating up, driven by growing support from governments, the need to add more features and compute elements into systems, and a widespread recognition that there are better paths forward than packing everything into a single SoC at the same process node. The leading edge of chip design has changed dramatically over the last few years. Int... » read more

FPGA-Proven RISC-V System With Hardware Accelerated Task Scheduling

By Technical Paper Link - 24 Oct, 2023 - Comments: 0

A technical paper titled “Enabling HW-based Task Scheduling in Large Multicore Architectures” was published by researchers at Barcelona Supercomputing Center, University of Campinas, University of Sao Paulo, and Arteris Inc. Abstract: "Dynamic Task Scheduling is an enticing programming model aiming to ease the development of parallel programs with intrinsically irregular or data-dependent... » read more

Chip Industry Week In Review

By The SE Staff - 20 Oct, 2023 - Comments: 0

By Susan Rambo, Gregory Haley, and Liz Allan SRC unfurled its Microelectronics and Advanced Packaging (MAPT) industry-wide 3D semiconductor roadmap, addressing such topics as advanced packaging, heterogeneous integration, analog and mixed-signal semiconductors, energy efficiency, security, the related foundational ecosystem, and more. The guidance is the collective effort of 300 individuals ... » read more

Chip Industry Week In Review

By The SE Staff - 13 Oct, 2023 - Comments: 0

By Liz Allan, Jesse Allen, and Karen Heyman. Canon uncorked a nanoimprint lithography system, which the company said will be useful down to about the 5nm node. Unlike traditional lithography equipment, which projects a pattern onto a resist, nanoimprint directly transfers images onto substrates using a master stamp patterned by an e-beam system. The technology has a number of limitations and... » read more

RISC-V Wants All Your Cores

By Brian Bailey - 12 Oct, 2023 - Comments: 0

RISC-V is no longer content to disrupt the CPU industry. It is waging war against every type of processor integrated into an SoC or advanced package, an ambitious plan that will face stiff competition from entrenched players with deep-pocketed R&D operations and their well-constructed ecosystems. When Calista Redmond, CEO for RISC-V International, said at last year's summit that RISC-V w... » read more

Chip Industry Week In Review

By The SE Staff - 06 Oct, 2023 - Comments: 0

By Jesse Allen, Liz Allan, and Gregory Haley A potential government shutdown beginning in November would be "massively disruptive" for the Commerce Department as it continues to disburse critical funding featured in the CHIPS Act to boost semiconductor research and development in the U.S., according to Secretary Gina Raimondo. Global semiconductor industry sales totaled $44 billion in Aug... » read more

Gearing Up For Level 4 Vehicles

By John Koon - 05 Oct, 2023 - Comments: 0

More autonomous features are being added into high-end vehicles, but getting to full autonomy will likely take years more effort, a slew of new technologies — some of which are not in use today, and some of which involve infrastructure outside the vehicle — along with sufficient volume to bring the cost of these combined capabilities down to an affordable price point. In the meantime, ma... » read more

Everyone’s A System Designer With Heterogeneous Integration

By Ann Mutschler - 02 Oct, 2023 - Comments: 0

The move away from monolithic SoCs to heterogeneous chips and chiplets in a package is accelerating, setting in motion a broad shift in methodologies, collaborations, and design goals that are felt by engineers at every step of the flow, from design through manufacturing. Nearly every engineer is now working or touching some technology, process, or methodology that is new. And they are inter... » read more

Network-on-Chips Enabling Artificial Intelligence/Machine Learning Everywhere

By Frank Schirrmeister - 28 Sep, 2023 - Comments: 0

Recently, I attended the AI HW Summit in Santa Clara and Autosens in Brussels. Artificial intelligence and machine learning (AI/ML) were critical themes for both events, albeit from different angles. While AI/ML as a buzzword is very popular these days in all its good and bad ways, in discussions with customers and prospects, it became clear that we need to be precise in defining what type of A... » read more

Quantum Plus AI Widens Cyberattack Threat Concerns

By John Koon - 18 Sep, 2023 - Comments: 1

Quantum computing promises revolutionary changes to the computing paradigm that the semiconductor industry has operated under for decades, but it also raises the prospect of widespread cybersecurity threats. Quantum computing cyberattacks will occur millions of times faster than any assault conventional computing can muster. And while quantum computing is in an early stage of development, ex... » read more

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Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

by Bryon Moyer

tag: Arteris

Making Connections In 3D Heterogeneous Integration

FPGA-Proven RISC-V System With Hardware Accelerated Task Scheduling

Chip Industry Week In Review

Chip Industry Week In Review

RISC-V Wants All Your Cores

Chip Industry Week In Review

Gearing Up For Level 4 Vehicles

Everyone’s A System Designer With Heterogeneous Integration

Network-on-Chips Enabling Artificial Intelligence/Machine Learning Everywhere

Quantum Plus AI Widens Cyberattack Threat Concerns