tag: Arteris

Pressure Builds To Revamp The Design Flow
By Ed Sperling - 23 Apr, 2015 - Comments: 1

Without [getkc id="7" kc_name="EDA"] there would be no [getkc id="74" comment="Moore's Law"] as we know it today, and without Moore's Law there would be a much more limited need for EDA. But after more than three decades of developing design flows packed with sophisticated tools to automate semiconductor design through verification, and thereby enable feature shrinks that are the basis of Moore... » read more

Blurring The Lines On Prototyping
By Ann Mutschler - 23 Apr, 2015 - Comments: 0

Prototyping is an integral part of every [getkc id="81" kc_name="SoC"] today, with two main approaches being used: virtual or software-based, and physical, which includes FPGA-based boards as well as hardware emulation systems. [getkc id="104" kc_name="Virtual prototyping"] is typically used for software development in the early stages of SoC design, even before SoC [getkc id="49" kc_name="R... » read more

The Week In Review: Design/IoT
By Jesse Allen - 10 Apr, 2015 - Comments: 0

Certifications TSMC certified a number of tools for its current 10nm FinFET design rules and SPICE models and 16nm FinFET Plus (16FF+) V1.0 process, including: Ansys' power integrity and electromigration tools; Cadence's custom/analog and digital implementation and signoff tools; Mentor Graphics' physical verification, design for manufacturing, and circuit verification tools; and Synopsys' ful... » read more

The Week In Review: Design/IoT
By Jesse Allen - 03 Apr, 2015 - Comments: 0

IP Synopsys unveiled a line of vision processor IP cores optimized for high-performance embedded vision applications. The processors can be used with any host processors, sport multiple cores and implement a convolutional neural network to deliver more than 1000 GOPS/W, plus a software programming environment that supports OpenVX and OpenCV libraries. Deals Andes Technology and eMemory Tec... » read more

Blog Review: April 1
By Jesse Allen - 01 Apr, 2015 - Comments: 0

A Russian plan to build a massive cargo plane to deliver tanks at supersonic speed—A roll of tape coated in squid proteins provides perfect camouflage—A yacht made of volcanic fibers battling the world's roughest seas: Ansys' Justin Nescott finds everything for a James Bond movie in this week's top tech articles. Writing for Synopsys, Broadcom's Hari Balisetty looks at reusable sequences... » read more

What Is Functional Accuracy?
By Ann Mutschler - 26 Mar, 2015 - Comments: 0

What it means to be functionally accurate in the context of [getkc id="104" kc_name="virtual platforms"] varies greatly, depending upon whom you ask and even when you ask them. But that doesn’t mean that functional accuracy isn’t useful. Jon McDonald, technical marketing engineer for the design and creation business at [getentity id="22017" e_name="Mentor Graphics"], expects to see a lot... » read more

Focus More Attention On The SoC’s Central Nervous System
By Kurt Shuler - 26 Mar, 2015 - Comments: 0

In multiple conversations over the years, I’ve often compared the interconnect fabric within SoC designs to the central nervous system of the human body. The point that I try to make is that the potential of the SoC’s performance and functionality is tied to the information that travels through the fabric and interconnect to all the on-chip IP components. Improving a chip’s ability to com... » read more

The Week In Review: Design/IoT
By Jesse Allen - 20 Mar, 2015 - Comments: 0

Mergers & Acquisitions Silvaco acquired Invarian, anticipating integration of Invarian's methodology will accelerate adoption of concurrent power-voltage-thermal analysis. Legal A U.S. District Court judge ordered Kilopass to pay $5.5 million to Sidense for legal fees incurred in Kilopass' patent infringement suit against Sidense. That lawsuit was  dismissed in 2012. Sidense filed... » read more

The Week In Review: Design/IoT
By Jesse Allen - 27 Feb, 2015 - Comments: 0

Mergers & Acquisitions NXP acquired Quintic’s Bluetooth Low Energy and Wearable businesses, adding BLTE to their low power RF-connectivity portfolio. The team of approximately 65 is expected to join NXP when the deal closes in Q1 2015. Tools Cadence unveiled the integration of Forte's Cynthesizer with their own C-to-Silicon Compiler. The result is the Stratus high-level synthesis... » read more

Partition Lines Growing Fuzzy
By Ed Sperling - 26 Feb, 2015 - Comments: 0

For as long as most semiconductor engineers can remember, chips with discrete functions started out on a printed circuit board, progressed into chip sets when it made sense and eventually were integrated onto the same die. The primary motivations behind this trend were performance and cost—shorter distance, fewer mask layers, less silicon. But this equation has been changing over the past ... » read more

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