RISC-V’s Software Portability Challenge


Experts At The Table: RISC-V provides a platform for customization, but verifying those changes remains challenging. Semiconductor Engineering discussed the issue with John Min, vice president of customer service at Arteris; ZdenÄ›k PÅ™ikryl, CTO of Codasip; Neil Hand, director of marketing at Siemens EDA (at the time of this discussion); Frank Schirrmeister, executive director for strategi... » read more

Scaling Performance In AI Systems


Improving performance in AI designs involves the usual tradeoffs in power and performance, but achieving a good balance is becoming much more challenging. There is more data to process, new heterogeneous architectures to contend with, and much higher utilization rates. Andy Nightingale, vice president of product management and marketing at Arteris, talks about where the bottlenecks are, how to ... » read more

Chip Industry Week In Review


Analog Devices acquired Flex Logix's technology assets, along with its technical team. Semiconductor global sales increased 23% in Q3 2024 $166B, up almost 11% versus the same period in 2023, according to SIA. Notable regional year-to-year sales in September: Americas up 46%, China up 23%, Europe down 8%. Fig.1: Worldwide Semiconductor Revenues, year-to-year % change. Source: Semiconduc... » read more

Chip Industry Week In Review


Siemens announced plans to acquire Altair Engineering, a provider of industrial simulation and analysis, data science, and high-performance computing (HPC) software, for about $10 billion. Altair's software will become part of Siemens' Xcelerator portfolio and provide a boost to physics-based digital twins. Onto Innovation bought Lumina Instruments, a San Jose, California-based maker of lase... » read more

Reducing SoC Power With NoCs And Caches


Today’s system-on-chip (SoC) designs face significant challenges with respect to managing and minimizing power consumption while maintaining high performance and scalability. Network-on-chip (NoC) interconnects coupled with innovative cache memories can address these competing requirements. Traditional NoCs SoCs consist of IP blocks that need to be connected. Early SoCs used bus-based archi... » read more

Chiplets Make Progress Using Interconnects As Glue


Breaking up SoCs into their component parts and putting those and other pieces together in some type of heterogeneous assembly is beginning to take shape, fueled by advances in interconnects, complex partitioning, and industry learnings about what works and what doesn't. While the vision of plug-and-play remains intact, getting there is a lot more complicated than initially imagined. It can ... » read more

RISC-V Conformance


Experts At The Table: Despite growing excitement and participation in the development of the RISC-V ecosystem, significant holes remain in the development flow. One of the most concerning is conformance, which must exist before software portability becomes possible. Semiconductor Engineering discussed the issue with John Min, vice president of customer service at Arteris; ZdenÄ›k PÅ™ikryl, CTO... » read more

Accelerate AI SoC Designs with NoC Tiling


Network-on-chip (NoC) tiling technology is revolutionizing AI and machine learning-enabled semiconductor designs. This emerging approach uses proven, robust network-on-chipIP to facilitate scaling, condense design time, speed testing and reduce design risk. It allowsSoC architects to create modular, scalable designs by replicating soft tiles across the chip. Each soft tile represents a self-con... » read more

Chip Industry Week In Review


Europe's top court ruled in Intel's favor, voiding a $1.1 billion fine imposed by the European Union and dismissing charges of anti-competitive behavior. IBM released yield benchmarks for high-NA EUV, which serve as proof points that the newest advanced litho equipment will enable scaling beyond the 2nm process node. Also on the lithography front, Nikon is developing a maskless digital litho... » read more

Chip Industry Week In Review


Arm joined forces with Korea's Samsung Foundry, ADTechnology, and Rebellions to create a CPU chiplet platform for AI training and inference. The new chiplet will be based on Samsung's 2nm gate-all-around technology. Intel and AMD, arch competitors for decades, formed an x86 ecosystem advisory group to collaborate on architectural interoperability and simplify software development. Samsung... » read more

← Older posts Newer posts →