tag: ASE Group

The Week In Review: Design
By Jesse Allen - 01 Dec, 2017 - Comments: 0

Tools Imperas debuted its RISC-V Processor Developer Suite, a set of models, a software simulator, and tools to validate, verify, and provide early estimation of timing performance and power consumption for RISC-V processors. IP Minima Processor revealed its dynamic-margining subsystem IP for near-threshold voltage design. The startup's hardware and software IP works with a CPU or DSP proc... » read more

The Week In Review: IoT
By Jeff Dorsch - 25 Aug, 2017 - Comments: 0

Deals Advanced Semiconductor Engineering was selected by zGlue as its strategic manufacturing partner. The ASE Group will make the zGlue Integrated Platform, which is said to enable customization for consumer and industrial IoT markets. The ZiP integrates hardware and software in a modular 3DIC-based platform. ASE will assemble zGlue-certified chiplets for connecting through zGlue Smart Fabric... » read more

Optimizing Multiple IoT Layers
By Ann Mutschler - 01 Dec, 2016 - Comments: 0

As the number of connected devices rises, so do questions about how to optimize them for target markets, how to ensure they play nicely together, and how to bring them to market quickly and inexpensively. [getkc id="76" kc_name="IoT"] is broad term that encompasses a lot of disparate pieces for devices, systems, and connected systems. At the highest levels are hardware and software, but with... » read more

Making 2.5D, Fan-Outs Cheaper
By Ed Sperling - 17 Nov, 2016 - Comments: 2

Now that it has been shown to work, the race is on to make advanced [getkc id="27" kc_name="packaging"] more affordable. While device scaling could continue for another decade or more, the number of companies that can afford to develop SoCs at the leading edge will continue to decline. The question now being addressed is what can supplant it, supplement it, or redefine it. At the center o... » read more

Why Packaging Matters
By Ed Sperling - 19 Nov, 2015 - Comments: 1

The semiconductor package is changing. What was until very recently considered an afterthought is now becoming a key part of the design process at all major chipmakers, and a critical factor in the extension of Moore's Law. This is a sharp reversal of what was almost universally an afterthought in planar silicon design and manufacturing. Rarely was the package an integral part of the archite... » read more

Is The 2.5D Supply Chain Ready?
By Ed Sperling - 28 Sep, 2015 - Comments: 0

A handful of big semiconductor companies began taking the wraps off 2.5D and fan-out packaging plans in the past couple of weeks, setting the stage for the first major shift away from Moore's Law in 50 years. Those moves coincide with reports of commercial [getkc id="82" kc_name="2.5D"] chips from chip assemblers and foundries that are now under development. There have been indications for... » read more

Foundries Versus OSATs
By Ed Sperling - 24 Jul, 2014 - Comments: 2

Since the 1990s, commercial foundries have ruled semiconductor manufacturing while the [getkc id='83' comment='OSAT'] providers (OSATs) have dominated IC packaging and testing. But as the industry moves toward stacked die over the next couple of years, and big foundries see a chance to expand their reach, the stage is set for an all-out war. There is much at stake on both sides. Foundries g... » read more

Stacked Die Are Coming Soon. Really
By Ed Sperling - 10 Jul, 2014 - Comments: 3

Since the beginning of the decade there have been many predictions that stacked die were just over the hill, but the time it has taken to climb that hill has been longer than most people would have anticipated. In fact, TSMC has been fully capable of building stacked die since last year, with risk production expected to be completed by year, according to Gartner. But something very fundament... » read more

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