tag: A*Star

Manufacturing Bits: Feb. 16
By Mark LaPedus - 16 Feb, 2021 - Comments: 0

Hybrid bonding consortium for packaging A*STAR’s Institute of Microelectronics (IME) and several companies have formed a new consortium to propel the development of hybrid bonding technology for chip-packaging applications. The group, called the Chip-to-Wafer (C2W) Hybrid Bonding Consortium, includes A*STAR’s IME organization, Applied Materials, ASM Pacific, Capcon, HD MicroSystems, ONT... » read more

Manufacturing Bits: June 30
By Mark LaPedus - 30 Jun, 2020 - Comments: 0

1μm pitch wafer bonding At the recent IEEE Electronic Components and Technology Conference (ECTC), Imec presented a paper on a fine-pitch hybrid wafer-to-wafer bonding technology for heterogeneous integration. Imec described a way to enable hybrid bond pitches down to 1μm using a novel Cu/SiCN (copper/silicon-carbon-nitrogen) surface topography. Today, the industry is developing or shi... » read more

The Next Advanced Packages
By Mark LaPedus - 18 Jun, 2020 - Comments: 4

Packaging houses are readying their next-generation advanced IC packages, paving the way toward new and innovative system-level chip designs. These packages include new versions of 2.5D/3D technologies, chiplets, fan-out and even wafer-scale packaging. A given package type may include several variations. For example, vendors are developing new fan-out packages using wafers and panels. One is... » read more

Manufacturing Bits: June 25
By Mark LaPedus - 25 Jun, 2019 - Comments: 0

Panel-level consortium Fraunhofer is moving forward with the next phase of its consortium to develop technologies for panel-level packaging. In 2016, Fraunhofer launched the original effort, dubbed the Panel Level Packaging Consortium. The consortium, which had 17 partners, developed various equipment and materials in the arena. Several test layouts were designed for process development on ... » read more

Manufacturing Bits: June 10
By Mark LaPedus - 10 Jun, 2019 - Comments: 1

Predicting warpage in packages At the recent IEEE Electronic Components and Technology Conference (ECTC) in Las Vegas, there were several papers on ways to predict variation and warpage in IC packages. Advanced packages are prone to unwanted warpage during the process flow. The warpage challenges escalate as the packages become thinner. Warpage in turn can impact yields in IC packages. ... » read more

Week In Review: Manufacturing, Test
By Mark LaPedus - 29 Mar, 2019 - Comments: 0

Materials Wesfarmers, an Australian diversified firm, has made an unsolicited bid to acquire Lynas, one of the world’s largest suppliers of rare earths outside of China. Rare earths are chemical elements found in the Earth’s crust. They are used in cars, consumer electronics, computers, communications, clean energy and defense systems. The big market for rare earths is magnets. In semicond... » read more

Manufacturing Bits: Feb. 5
By Mark LaPedus - 05 Feb, 2019 - Comments: 1

Multi-beam litho shakeout The multi-beam e-beam market for lithography applications continues to undergo a shakeout amid technical roadblocks and other issues. Last week, ASML announced that it had acquired the intellectual-property (IP) assets of Mapper Lithography, a Dutch supplier of multi-beam e-beam tools for lithography applications that fell into bankruptcy late last year. As it t... » read more

Power/Performance Bits: Sept. 25
By Jesse Allen - 25 Sep, 2018 - Comments: 0

Heat transfer in 2D materials Engineers at the University of Illinois developed a way to reduce overheating in nanoelectronics that incorporate 2D components by adding another layer to the structure. "In the field of nanoelectronics, the poor heat dissipation of 2D materials has been a bottleneck to fully realizing their potential in enabling the manufacture of ever-smaller electronics whil... » read more

Manufacturing Bits: March 27
By Mark LaPedus - 27 Mar, 2018 - Comments: 0

Nanostructure printers Using electron-beam lithography and reactive-ion etching techniques, Singapore’s Agency for Science, Technology and Research (A*STAR) has developed a new high-resolution color nanostructure printing system. The printer enables nanostructures made from silicon. It prints tiny structures with a wide range of colors. In the future, researchers hope that nanostructure ... » read more

The Week In Review: Manufacturing
By Mark LaPedus - 10 Nov, 2017 - Comments: 0

Packaging and test A*STAR’s Institute of Microelectronics (IME) has formed a fan-out wafer-level packaging consortium comprising of OSATs, materials vendors, equipment suppliers and others. The group is called the FOWLP Development Line Consortium. As part of the announcement, Singapore’s IME has established a development line to accelerate the development of fan-out. Located in IME’s... » read more

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