tag: Atrenta

Experts At The Table: 3D Stacking
By Ed Sperling - 14 Feb, 2011 - Comments: 0

By Ed Sperling Semiconductor Manufacturing and Design sat down with Riko Radojcic, director of engineering at Qualcomm; Drew Wingard, CTO at Sonics; Michael White, senior product marketing manager for Calibre physical verification at Mentor Graphics; Jim Hogan, a Silicon Valley venture capitalist; Prasad Subramaniam, vice president of design technology at eSilicon; and Mike Gianfagna, vice pre... » read more

3D Stacking: Reality Check
By Ed Sperling - 14 Feb, 2011 - Comments: 0

Semiconductor Manufacturing & Design examines the myth and reality of 3D stacking--and the hurdles that still need to be solved. In the hot seat: VC Jim Hogan; eSilicon's Prasad Subramanian; Sonics' Drew Wingard; Atrenta's Mike Gianfagna, and Mentor Graphics' Michael White. [youtube vid=fWQUGgwC-F4] » read more

Concurrent Design
By Ed Sperling - 11 Feb, 2011 - Comments: 0

The idea of developing software and hardware simultaneously isn't new, but it has taken on renewed urgency in IC design because of growing complexity, including power and proximity issues. Low-Power Engineering captures the perspective of executives at four companies working in this market: Marco Brambilla of STMicroelectronics; Charlie Janac of Arteris; Mike Gianfagna of Atrenta, and Javier De... » read more

Experts At The Table: Concurrent Design
By Ed Sperling - 10 Feb, 2011 - Comments: 0

Low-Power Engineering sat down with Marco Brambilla, ASIC design manager at STMicroelectronics; Charlie Janac, president and CEO of Arteris; Mike Gianfagna, vice president of marketing at Atrenta, and Javier DeLaCruz, director of semiconductor packaging at eSilicon. What follows are excerpts of that discussion. LPE: What is concurrent design and how has the definition changed? DeLaCruz: Th... » read more

The Quest To Better Define Applications
By Ed Sperling - 27 Jan, 2011 - Comments: 0

By Ed Sperling For nearly five decades, just being able to get software to run on hardware and communicate with other systems was considered a feat of engineering. But with that part of the technology solved well enough, the next big challenge is to make sure that applications can run as efficiently as possible to maximize performance, minimize power consumption and limit the area required to ... » read more

Connecting System-Level Flows To Implementation Tools
By Ed Sperling - 27 Jan, 2011 - Comments: 0

By Ann Steffora Mutschler With the complexity explosion occurring in SoC design today, there is a relentless force to push design decisions further up in terms of abstraction. Resolving issues at the gate level is not possible any more because there just isn’t enough time or resources. Further, the resulting design may not even be competitive because optimization at the gate level can leave ... » read more

The Quest To Better Define Applications
By Ed Sperling - 27 Jan, 2011 - Comments: 0

By Ed Sperling For nearly five decades, just being able to get software to run on hardware and communicate with other systems was considered a feat of engineering. But with that part of the technology solved well enough, the next big challenge is to make sure that applications can run as efficiently as possible to maximize performance, minimize power consumption and limit the area required to ... » read more

Connecting System-Level Flows To Implementation Tools
By Ed Sperling - 27 Jan, 2011 - Comments: 0

By Ann Steffora Mutschler With the complexity explosion occurring in SoC design today, there is a relentless force to push design decisions further up in terms of abstraction. Resolving issues at the gate level is not possible any more because there just isn’t enough time or resources. Further, the resulting design may not even be competitive because optimization at the gate level can leave ... » read more

CES—The Morning After
By Bernard Murphy - 27 Jan, 2011 - Comments: 0

CES 2010 was quite a party, coming off the misery of 2008-2009. Tablets were everywhere, smart phones are racing ahead, the PC is dead. Our industry is reinventing the electronic experience yet again. I saw one forecast of a $1 trillion consumer electronics market within a few years. This is heady stuff. It restores hope not only in the future of electronics but also the possibility that electr... » read more

Experts At The Table: IP Integration Hurdles
By Ed Sperling - 17 Dec, 2010 - Comments: 0

By Ed Sperling Low-Power Engineering sat down to discuss IP integration issues with Ken Brock, senior staff product marketing manager for logic libraries in Synopsys’ Solutions Group; Kalar Rajendiran, senior director of marketing at eSilicon; Mike Gianfagna, vice president of marketing at Atrenta; and Jim McCanny, CEO of Altos Design Automation. What follows are excerpts of that conversati... » read more

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