CMOS Compatible Materials With Quantum Defects Suitable For Room Temperature Applications


A technical paper titled “Thin Film Materials for Room Temperature Quantum Applications” was published by researchers at Marquette University. Abstract: "Thin films with quantum defects are emerging as a potential platform for quantum applications. Quantum defects in some thin films arise due to structural imperfections, such as vacancies or impurities. These defects generate localized el... » read more

Heterogeneous Integration Issues And Developments


There are a slew of new developments in advanced packaging, from new materials, chiplets, and interconnect schemes, to challenges involving how to physically put chips in a package, metallization, thermal cycling, and parasitics in the interconnect path. Dick Otte, CEO of Promex Industries, talks about how this will change chip design and manufacturing, and how those changes are likely to unfol... » read more

Substitutional synthesis of sub-nanometer InGaN/GaN quantum wells with high indium content


Abstract "InGaN/GaN quantum wells (QWs) with sub-nanometer thickness can be employed in short-period superlattices for bandgap engineering of efficient optoelectronic devices, as well as for exploiting topological insulator behavior in III-nitride semiconductors. However, it had been argued that the highest indium content in such ultra-thin QWs is kinetically limited to a maximum of 33%, narro... » read more

Will Co-Packaged Optics Replace Pluggables?


As optical connections work their way deeper into the data center, a debate is underway. Is it better to use pluggable optical modules or to embed lasers deep into advanced packages? There are issues of convenience, power, and reliability driving the discussion, and an eventual winner isn’t clear yet. “The industry is definitely embracing co-packaged optics,” said James Pond, principal... » read more

Power Amp Wars Begin For 5G


Demand is increasing for power amplifier chips and other RF devices for 5G base stations, setting the stage for a showdown among different companies and technologies. The power amplifier device is a key component that boosts the RF power signals in base stations. It's based on two competitive technologies, silicon-based LDMOS or RF gallium nitride (GaN). GaN, a III-V technology, outperforms ... » read more

The Ins And Outs Of Silicon Carbide


John Palmour, CTO at Cree, sat down with Semiconductor Engineering to talk about silicon carbide, how it compares to silicon, what's different from a design and packaging standpoint, and where it's being used. What follows are excerpts of that conversation. SE: SiC is well-understood in power electronics and RF, but is the main advantage the ability to run devices hotter than silicon, or is ... » read more

The Good And Bad Of 2D Materials


Despite years of warnings about reaching the limits of silicon, particularly at leading-edge process nodes where electron mobility is limited, there still is no obvious replacement. Silicon’s decades-long dominance of the integrated circuit industry is only partly due to the material’s electronic properties. Germanium, gallium arsenide, and many other semiconductors offer superior mobili... » read more

Can Graphene Be Mass Manufactured?


Since the isolation of graphene in 2004, the high mobility and unique transport properties of 2-dimensional semiconductors have tantalized physicists and materials scientists. Their in-plane carrier transport and lack of dangling bonds potentially can minimize line/edge scattering and other effects of extreme scaling. While 2-D materials cannot compete with silicon at current device dime... » read more

Uncertainty Grows For 5nm, 3nm


As several chipmakers ramp up their 10nm finFET processes, with 7nm just around the corner, R&D has begun for 5nm and beyond. In fact, some are already moving full speed ahead in the arena. [getentity id="22586" comment="TSMC"] recently announced plans to build a new fab in Taiwan at a cost of $15.7 billion. The proposed fab is targeted to manufacture TSMC’s 5nm and 3nm processes, whic... » read more

What Transistors Will Look Like At 5nm


Chipmakers are currently ramping up 16nm/14nm finFET processes, with 10nm and 7nm just around the corner. The industry also is working on 5nm. TSMC hopes to deliver a 5nm process by 2020. GlobalFoundries, Intel and Samsung are doing R&D for that node. But 5nm technology presents a multitude of unknowns and challenges. For one thing, the exact timing and specs of 5nm remain cloudy. The... » read more

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