tag: bottlenecks

Very Short Reach SerDes In Data Centers
By Ed Sperling - 13 Dec, 2023 - Comments: 0

Speed is critical inside of data centers, and the distance that signals have to travel can have a big impact on time to results. But there are a number of variables that need to be considered, including what is an acceptable loss, how much power can be dissipated in a server rack, and what are the various connection options being used. Keivan Javadi Khasraghi, staff technical product manager at... » read more

HBM3 In The Data Center
By Ed Sperling - 17 Oct, 2022 - Comments: 0

Frank Ferro, senior director of product management at Rambus, talks about the forthcoming HBM3 standard, why this is so essential for AI chips and where the bottlenecks are today, what kinds of challenges are involved in working with this memory, and what impact chiplets and near-memory compute will have on HBM and bandwidth.     » read more

A New Era For HPC-Driven Engineering Simulation
By Ansys - 12 Sep, 2022 - Comments: 0

Market pressure and technological advancements have rapidly changed the way engineers work. Design engineers increasingly work with larger and more complex models, must conduct more frequent simulation analysis, and iterate more rapidly. Compute constraints, however, often result in engineers limiting model sizes and simulation fidelity, or relying on lengthy, overnight simulation runs. ... » read more

Domain-Specific Processors Enable More Than Moore
By Roddy Urquhart - 28 May, 2020 - Comments: 0

Last month was the 55th anniversary of Gordon Moore’s famous paper Cramming more components onto integrated circuits. He took a long-term view of the trends in integrated circuits being implemented using successively smaller feature sizes in silicon. Since that paper, integrated circuit developers have been relying on three of his predictions: The number of transistors per chip increas... » read more

Breaking The AI Memory Bottleneck
By Michael Hall - 15 Aug, 2019 - Comments: 0

In the long unfolding arc of technology innovation, artificial intelligence (AI) looms as immense. In its quest to mimic human behavior, the technology touches energy, agriculture, manufacturing, logistics, healthcare, construction, transportation and nearly every other imaginable industry – a defining role that promises to fast track the fourth Industrial Revolution. And if the industry orac... » read more

A Primer On Last-Level Cache Memory For SoC Designs
By Kurt Shuler - 06 Sep, 2018 - Comments: 0

System-on-chip (SoC) architects have a new memory technology, last level cache (LLC), to help overcome the design obstacles of bandwidth, latency and power consumption in megachips for advanced driver assistance systems (ADAS), machine learning, and data-center applications. LLC is a standalone memory that inserts cache between functional blocks and external memory to ease conflicting requireme... » read more

Getting Ready For The IoT
By Emerson Hsiao - 29 Feb, 2016 - Comments: 0

A major change is underway in the semiconductor industry, and it is being driven by the Internet of Things. Gartner defines the IoT as a “network of dedicated physical objects (things) that contain embedded technology to sense or interact with their internal state or external environment. The IoT comprises an ecosystem that includes things, communication, applications and data analysis.” ... » read more

Optimizing DDR Memory Subsystem Efficiency
By Synopsys - 24 Feb, 2016 - Comments: 0

The memory subsystem sits at the core of a System-on-Chip (SoC) platform and can make all the difference between a well-designed system meeting its performance requirements and a system that delivers poor performance, or even fails to operate correctly. State-of-the-art DDR memory controllers use advanced arbitration and scheduling policies to optimize DDR memory efficiency. At the same time, t... » read more

Shifting Performance Bottlenecks Driving Change In Chip And System Architectures
By Steven Woo - 14 Jan, 2016 - Comments: 0

The rise of personal computing in the 1980s — along with graphical user interfaces (GUIs) and applications ranging from office apps to databases — drove the demand for faster chips capable of removing processing bottlenecks and delivering a more responsive end-user experience. Indeed, the semiconductor industry has certainly come quite a long way since IBM launched its PC way back in 1981. ... » read more

Dealing With New Bottlenecks
By Ed Sperling - 11 Jul, 2013 - Comments: 0

By Ed Sperling While the number of options for improving efficiency and performance in designs continues to increase, the number of challenges in getting chips at advanced process nodes out the door is increasing, too. Thinner wires, routing congestion, more power domains, IP integration and lithography issues are conspiring to make design much more difficult than in the past. So why aren�... » read more

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