tag: Brewer Science

Week In Review: Manufacturing, Test
By Mark LaPedus - 12 Feb, 2021 - Comments: 0

Chipmakers The U.S. Semiconductor Industry Association (SIA) and several chip executives have sent a joint letter to President Biden, urging the administration to include substantial funding for semiconductor manufacturing and research in the U.S. As reported, the share of global semiconductor manufacturing capacity in the U.S. has decreased from 37% in 1990 to 12% today. “Semiconductors pow... » read more

The Good, Bad And Unknowns Of Flexible Devices
By Ed Sperling - 27 Jan, 2021 - Comments: 0

Flexible hybrid electronics are beginning to proliferate in consumer, medical, and industrial applications due to their comparatively low weight, thin profile, and the ability to literally bend the rules of design. Open any smart phone today and you're likely to find one or more of these flexible boards. Unlike standard printed circuit boards, FHE devices are printed using a combination of r... » read more

Eyes On Zero Defects: Defect Detection And Characterization Metrology
By Darin Collins - 21 Jan, 2021 - Comments: 0

By Darin Collins and Jessica Albright Metrology is the science of measuring, characterizing, and analyzing materials. Within metrology, there are several technologies used to detect material defects on a very small scale – precision on the scale of parts per trillion or less is necessary in the pursuit of zero defects. We broadly define our characterization approach into three main categor... » read more

Week In Review: Manufacturing, Test
By Mark LaPedus - 15 Jan, 2021 - Comments: 0

Chipmakers and OEMs Intel has appointed Pat Gelsinger as its new chief executive, effective Feb. 15. Gelsinger will also join Intel’s board upon assuming the role. He will succeed Bob Swan, who will remain CEO until Feb. 15. Most recently, Gelsinger served as the CEO of VMware since 2012. He also spent 30 years at Intel, becoming the company’s first chief technology officer. The move fo... » read more

CEO Outlook: 2021
By Ed Sperling - 04 Jan, 2021 - Comments: 0

The new year will be one of significant transition and innovation for the chip industry, but there are so many new applications and market segments that broad generalizations are becoming less meaningful. Unlike in years past, where sales of computers or smart phones were a good indication of how the chip industry would fare, end markets have both multiplied and splintered, greatly increasin... » read more

Variation Threat In Advanced Nodes, Packages Grows
By Ed Sperling - 21 Dec, 2020 - Comments: 0

Variation is becoming a much bigger and more complex problem for chipmakers as they push to the next process nodes or into increasingly dense advanced packages, raising concerns about the functionality and reliability of individual devices, and even entire systems. In the past, almost all concerns about variation focused on the manufacturing process. What printed on a piece of silicon didn't... » read more

EUV Challenges And Unknowns At 3nm and Below
By Mark LaPedus - 19 Nov, 2020 - Comments: 1

The chip industry is preparing for the next phase of extreme ultraviolet (EUV) lithography at 3nm and beyond, but the challenges and unknowns continue to pile up. In R&D, vendors are working on an assortment of new EUV technologies, such as scanners, resists, and masks. These will be necessary to reach future process nodes, but they are more complex and expensive than the current EUV pro... » read more

Improving EUV Underlayer Coating Defectivity Using Point-Of-Use Filtration
By Brewer Science - 18 Nov, 2020 - Comments: 0

Authors: Aiwen Wu (Entegris, Inc. — United States), Hareen Bayana (Entegris GmbH — Germany), Philippe Foubert (imec — Belgium), Andrea Chacko and Douglas Guererro (Brewer Science, Inc. — United States). This paper describes efforts to leverage different filtration parameters, including retention ratings and membrane materials, to understand their impact on EUV underlayer coating defe... » read more

Week In Review: Auto, Security, Pervasive Computing
By SE Staff - 13 Nov, 2020 - Comments: 0

Automotive Cadence achieved ASIL Level B in support of D (ASIL B(D))-compliant certification for its Tensilica ConnX B10 and ConnX B20 DSPs, which are designed for automotive radar, lidar, and vehicle-to-everything (V2X). SGS-TÜV Saar certified that the DSPs have support for random hardware faults and systematic faults. Synopsys is acquiring Moortec, whose process, voltage, and temperature... » read more

Si Hardmask (Si-HM), EUV And Zero Defects
By Hao Lee - 26 Oct, 2020 - Comments: 0

The multilayer system used in lithography consists of a planarizing carbon layer beneath a hardmask etch-transferring layer and capped with a standard photoresist coating. In the past, Brewer Science has discussed in-depth how the multilayer system helped to extend ArF (193 nm) immersion lithography to be able to print and transfer ever-shrinking features, ensuring enough process window especia... » read more

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