Bumps Vs. Hybrid Bonding For Advanced Packaging


Advanced packaging continues to gain steam, but now customers must decide whether to design their next high-end packages using existing interconnect schemes or move to a next-generation, higher-density technology called copper hybrid bonding. The decision is far from simple, and in some cases both technologies may be used. Each technology adds new capabilities in next-generation advanced pac... » read more

Finding, Predicting EUV Stochastic Defects


Several vendors are rolling out next-generation inspection systems and software that locates problematic defects in chips caused by processes in extreme ultraviolet (EUV) lithography. Each defect detection technology involves various tradeoffs. But it’s imperative to use one or more of them in the fab. Ultimately, these so-called stochastic-induced defects caused by EUV can impact the perf... » read more

Reliability Costs Becoming Harder To Track


Ensuring reliability in chips is becoming more complex and significantly more expensive, shifting left into the design cycle and right into the field. But those costs also are becoming more difficult to define and track, varying greatly from one design to the next based upon process node, package technology, market segment, and which fab or OSAT is used. As the number of options increases fo... » read more

Characterization Of CMP Processes With White Light Interferometry


Faster computer and electronic processors require smaller features for integrated circuits (IC), which in turn require smaller and smoother substrate surfaces. Chemical mechanical polishing (CMP) has become one of the most critical semiconductor fabrication technologies because it offers a superior means of removing unwanted topography in interlevel dielectric layers and achieving sufficient pl... » read more

The Increasingly Uneven Race To 3nm/2nm


Several chipmakers and fabless design houses are racing against each other to develop processes and chips at the next logic nodes in 3nm and 2nm, but putting these technologies into mass production is proving both expensive and difficult. It's also beginning to raise questions about just how quickly those new nodes will be needed and why. Migrating to the next nodes does boost performance an... » read more

Demand, Lead Times Soar For 300mm Equipment


A surge in demand for various chips is causing select shortages and extended lead times for many types of 300mm semiconductor equipment, photomask tools, wafers, and other products. For the last several years, 200mm equipment has been in short supply in the market, but issues are now cropping up throughout the 300mm supply chain, as well. Traditionally, lead times have been three to six mont... » read more

Week In Review: Manufacturing, Test


Chipmakers and OEMs IBM has unveiled what the company says is the world’s first 2nm chip. The device is based on a next-generation transistor architecture called a nanosheet FET. The nanosheet FET is an evolutionary step from finFETs, which is today’s state-of-the-art transistor technology. Targeted for 2024, IBM’s 2nm chip features a novel multi-Vt scheme, a 12nm gate length, and a n... » read more

Week In Review: Manufacturing, Test


Chipmakers TSMC has posted strong results and raised its capital spending budget to $30 billion, up from its prior guidance of $25 billion to $28 billion in 2021. “Its outlook indicates broad-based semiconductor demand continues to strengthen amid supply chain tightness,” said Weston Twigg, an analyst at KeyBanc, in a research note. “TSMC posted another quarter of strong demand for leadi... » read more

The Quest For Curvilinear Photomasks


The semiconductor industry is making noticeable progress on the development of advanced curvilinear photomasks, a technology that has broad implications for chip designs at the most advanced nodes and the ability to manufacture those chips faster and cheaper. The question now is when will this technology move beyond its niche-oriented status and ramp up into high-volume manufacturing. For ye... » read more

Week In Review: Manufacturing, Test


Government policy President Biden has rolled out a proposal to boost the infrastructure in the U.S. As part of the plan, the president is calling on Congress to invest $50 billion in U.S. semiconductor manufacturing and research. The proposal must pass Congress, which isn’t going to be easy. “The President’s plan would invest ambitiously in U.S. semiconductor workers, manufacturing, and ... » read more

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