tag: Cadence

Week In Review: Design, Low Power
By Jesse Allen - 19 Nov, 2021 - Comments: 0

Tools Imperas Software released updated simulator and reference models that support the latest RISC-V extensions for Bit Manipulation 1.0.0, Cryptographic (Scalar) 1.0.0, and Vector 1.0, plus Privilege Specification 1.12. They are offered both as freely available, open-source reference models for the RISC-V community as well as commercial products. Ansys' multiphysics signoff solutions were... » read more

Week In Review: Auto, Security, Pervasive Computing
By Susan Rambo - 19 Nov, 2021 - Comments: 0

3D-ICs Samsung Foundry released 3D-IC EDA flows approvals. 3D-ICs, which are the multi-dies stacked together and integrated into a package, are finding use in automotive, high-performance computing, and artificial intelligence systems. Samsung Foundry qualified Cadence’s 2D-to-3D native 3D partitioning flow for 3D-IC design that automates creating a memory-on-logic 3D stacking configuration,... » read more

Zonal Architectures Play Key Role In Vehicle Security
By Ann Mutschler - 17 Nov, 2021 - Comments: 1

The automotive ecosystem is starting to shift toward zonal architectures, making vehicle functionality less dependent on the underlying hardware and allowing more flexibility in what gets processed where. The impact of that shift is both broad and significant. For carmakers, it could lead to hardware consolidation and more options for failovers in case something goes wrong with any system in... » read more

Blog Review: Nov. 17
By Jesse Allen - 17 Nov, 2021 - Comments: 0

In a podcast, Arm's Geof Wheelwright and Hilary Tam chat about the importance of efforts to decarbonize compute and how low-power compute can help ensure that the benefits of technology outweigh the environmental cost. Synopsys' Graham Allan and Vikas Gautam consider what's driving demand for HBM3, what's different from the previous HBM2E specification, unique design considerations, and how ... » read more

What Is An xPU?
By Brian Bailey - 11 Nov, 2021 - Comments: 0

Almost every day there is an announcement about a new processor architecture, and it is given a three-letter acronym — TPU, IPU, NPU. But what really distinguishes them? Are there really that many unique processor architectures, or is something else happening? In 2018, John L. Hennessy and David A. Patterson delivered the Turing lecture entitled, "A New Golden Age for Computer Architecture... » read more

Changing Server Architectures In The Data Center
By Bryon Moyer - 11 Nov, 2021 - Comments: 1

Data centers are undergoing a fundamental shift to boost server utilization and improve efficiency, optimizing architectures so available compute resources can be leveraged wherever they are needed. Traditionally, data centers were built with racks of servers, each server providing computing, memory, interconnect, and possibly acceleration resources. But when a server is selected, some of th... » read more

New Glasses Target Aspects Of AR & VR
By Paul McLellan - 11 Nov, 2021 - Comments: 0

Despite all the recent noise about the Metaverse (and Facebook changing its company name to Meta), I remain convinced that augmented reality (AR) is going to be more important than virtual reality (VR), at least in the medium term. For one thing, virtual reality headsets are large and expensive, at least today. I'm also not convinced that we all want to live in a virtual world like that...but I... » read more

Energy-Efficient SoCs For The Zettabyte Era Using Power-Saving IP And System Design Techniques
By Cadence - 10 Nov, 2021 - Comments: 0

As the modern world becomes increasingly connected, businesses and consumers alike are relying more and more on digital data. Behind the scenes, data centers that manage all of this digital data are a somewhat silent, yet impactful, part of this connectivity revolution. These data centers are lined with servers that process digital data for everything from social media status updates to analyti... » read more

Debugging Embedded Applications
By Ann Mutschler - 10 Nov, 2021 - Comments: 0

Debugging embedded designs is becoming increasingly difficult as the number of observed and possible interactions between hardware and software continue to grow, and as more features are crammed into chips, packages, and systems. But there also appear to be some advances on this front, involving a mix of techniques, including hardware trace, scan chain-based debug, along with better simulation ... » read more

Blog Review: Nov. 10
By Jesse Allen - 10 Nov, 2021 - Comments: 0

Cadence's Paul McLellan listens in as Malcolm Penn of Future Horizons explains key reasons behind the cyclical nature of the semiconductor industry and how the root of the current chip shortage problems goes back to before the pandemic. Siemens EDA's Ray Salemi continues investigating using Python for verification with a look at some UVM utilities and how they would be used in Python. Syn... » read more

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