Can Chiplets Serve Cost-Conscious Apps?


Chiplets are emerging as a significant new phase in the evolution of the semiconductor market, providing a way to continue scaling performance well beyond the size limitations of a reticle. But that improvement comes with a high price tag and a lot more complexity, which so far has limited adoption. One of the main reasons for the cost increase is the need for advanced packaging when employi... » read more

EDA Revenue Up 11% YoY In Q4 ’24


The EDA industry reported substantial revenue growth in Q4 2024, up 11% to $4.9 billion from $4.44 billion reported in the same quarter of 2023, according to the ESD Alliance, a SEMI Technology Community, announced Monday in its latest Electronic Design Market Data (EDMD) report. The four-quarter moving average, which compares the most recent four quarters to the prior four, rose 12.8%. Wald... » read more

Advanced Packaging Fundamentals for Semiconductor Engineers


Advanced packaging is inevitable. Large systems companies and processing vendors already are working with various types of highly engineered packaging. The rest of the semiconductor industry will follow at some point, whether they're designing their own packages, developing the tools, processes, materials, and methodologies to create them, or developing components that will be used inside of th... » read more

Lego-Style Software For Automotive And Industrial Chiplet Systems?


Chiplets are a key topic in the semiconductor industry today, as they offer the potential to greatly increase the performance and flexibility of chips. The current focus is primarily on implementation, in particular on the architecture and the development of die-to-die interfaces that enable efficient communication between the individual chips. These technologies hold out the promise of meeting... » read more

3D-IC Ecosystem Starts To Take Form


The adoption of chiplets is inevitable, but exactly when a mass migration toward this design approach will begin is yet to be determined. Nevertheless, some of the biggest technological and business-related barriers are being addressed. And while a chiplet-based design remains beyond the economic reach of many companies today, that is starting to change. Early signs of an emerging ecosystem ... » read more

Chip Aging Opens Up New Attack Vectors


The longer a piece of silicon is out in the field the more prone it becomes to a cyberattack, raising questions about the optimal longevity of circuits and the impact of extending their lifetimes. This is particularly challenging for safety- and mission-critical applications, where the cost of development can run as high as $100 million for some of the most complex designs. Chipmakers want t... » read more

Benefits And Challenges In Multi-Die Assemblies


Experts at the Table: Semiconductor Engineering sat down to discuss chiplets, hybrid bonding, and new materials with Michael Kelly, vice president of Chiplets and FCBGA Integration at Amkor; William Chen, fellow at ASE; Dick Otte, CEO of Promex Industries; and Sander Roosendaal, R&D director at Synopsys Photonics Solutions. What follows are excerpts of that discussion. To view part one of t... » read more

Unleashing AI Potential Through Advanced Chiplet Architectures


The rapid proliferation of machine-generated data is driving unprecedented demand for scalable AI infrastructure, placing extreme pressure on compute and connectivity within data centers. As the power requirements and carbon footprint of AI workloads rise, there is a critical need for efficient, high-performance hardware solutions to meet growing demands. Traditional monolithic ICs will not sca... » read more

Challenges In Managing Chiplet Resources


Managing chiplet resources is emerging as a significant and multi-faceted challenge as chiplets expand beyond the proprietary designs of large chipmakers and interact with other elements in a package or system. Poor resource management in chiplets adds an entirely new dimension to the usual power, performance, and area tradeoffs. It can lead to performance bottlenecks, because as chiplets co... » read more

Evaluation Tool For The Cost Impacts Of Chiplet-Specific Design Choices


A new technical paper titled "CATCH: a Cost Analysis Tool for Co-optimization of chiplet-based Heterogeneous systems" was published by researchers at UCLA, Duke University and Arizona State University. Abstract "With the increasing prevalence of chiplet systems in high-performance computing applications, the number of design options has increased dramatically. Instead of chips defaulting to... » read more

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