Design And Verification Issues In 2024


At the end of each year, I look back over the stories published and those that top the charts in terms of readership. I concentrate on those stories that are about the EDA tools and flows and the factors that are influencing them. These are good indicators of the problems designers and verification teams are facing today, and where they are looking for answers. This year's leading categories... » read more

Improving Verification Performance


Without methodology improvements, verification teams would not be able keep up with the growing complexity and breadth of the tasks assigned to them. Tools alone will not provide the answer. The magnitude of the verification task continues to outpace the tools, forcing design teams to seek out better ways to intermix and utilize the tools that are available. But as verification teams take on... » read more

Accelerating The AI Economy Through Heterogeneous Integration


The world is rapidly transitioning from an internet economy to an AI economy. In the internet economy, we stayed constantly connected to the internet 24/7 through our smartphones, PCs, and IoT devices. However, in the AI economy, every aspect of our lives is interwoven with artificial intelligence. You may already be familiar with AI tools such as ChatGPT or Google Gemini, which answer question... » read more

Automakers And Industry Need Specific, Extremely Robust, Heterogeneously Integrated Chiplet Solutions


Chiplets offer great potential for the automotive and industrial sectors, especially as these applications often have high performance requirements but are needed only in small quantities. The modular principle behind chiplets enables efficient design and production: individual components have to be produced only once and can then be flexibly combined to create tailored solutions. This offers m... » read more

Chiplet Interconnects Add Power And Signal Integrity Issues


The flexibility and scalability offered by chiplets make them an increasingly attractive choice over planar SoCs, but the rollout of increasingly heterogeneous assemblies adds a variety of new challenges around the processing and movement of data. Nearly all of the chiplets in use today were designed in-house by large systems companies and IDMs. Going forward, third-party chiplets will begin... » read more

Chiplet-Based NPUs to Accelerate Vehicular AI Perception Workloads


A new technical paper titled "Performance Implications of Multi-Chiplet Neural Processing Units on Autonomous Driving Perception" was published by researchers at UC Irvine. Abstract "We study the application of emerging chiplet-based Neural Processing Units to accelerate vehicular AI perception workloads in constrained automotive settings. The motivation stems from how chiplets technology i... » read more

Critical Design Considerations For High-Bandwidth Chiplet Interconnects (TSMC)


A new technical paper titled "High-Bandwidth Chiplet Interconnects for Advanced Packaging Technologies in AI/ML Applications: Challenges and Solutions" was published by researchers at TSMC. Abstract: "The demand for chiplet integration using 2.5D and 3D advanced packaging technologies has surged, driven by the exponential growth in computing performance required by Artificial Intelligence a... » read more

Outlook 2025: Embracing Chiplets


The semiconductor industry is rapidly evolving, and as we look towards 2025, chiplets are at the forefront of this transformation. The shift from traditional monolithic system-on-chip (SoC) designs to chiplet-based architectures is gaining momentum, driven by the need to meet ever-increasing computing demands. This evolution is not just a trend; it represents a fundamental change in how we appr... » read more

Analysis Of Multi-Chiplet Package Designs And Requirements For Production Test Simplification


In recent years there has been a sharp rise of multi-die system designs. Numerous publications targeting a large variety of applications exist in the public domain. One presentation [2] on the IEEE’s website does a good job of detailing the anecdotal path of multi-die systems by way of chiplet building blocks integrated within a single package [2]. The presentation includes references to a ha... » read more

New Tradeoffs In Leading-Edge Chip Design


Device design begins with the anticipated workload. What is it actually supposed to do? What resources — computational units, memory, sensors — are available? Answering these questions and developing the functional architecture are the first steps in a new design — well before committing it to silicon, said Tim Kogel, senior director of technical product management at Synopsys. Yet eve... » read more

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