tag: CMOS

Hybrid Sensing Platform w/Silicon Nanowires on a Fully Functional CMOS Chip Containing the Readout Electronics & Signal amplification
By Technical Paper Link - 03 Jun, 2022 - Comments: 0

New technical paper titled "Multisite Dopamine Sensing With Femtomolar Resolution Using a CMOS Enabled Aptasensor Chip" from TU Dresden, Riken Quantitative Biological Center, Imperial College London, NaMLab gGmbH, ETH Zürich, MaxWell Biosystems AG, TU Wien, and Institute of Radiopharmaceutical Cancer Research. Abstract "Many biomarkers including neurotransmitters are found in external bo... » read more

SCV (select, cross, and variation): Data Encryption
By Technical Paper Link - 06 May, 2022 - Comments: 0

A new technical paper "RSCV: Reversible Select, cross and variation architecture in quantum-dot cellular automata." Abstract "In the past few years, CMOS semiconductor has been a growing and evolving technology in VLSI. However, due to the scaling issue and some other constraints like heat generation, high power consumption QCA (quantum cellular automata) emerged as an alternate and enhan... » read more

An Event-Driven and Fully Synthesizable Architecture for Spiking Neural Networks
By Technical Paper Link - 20 Dec, 2021 - Comments: 0

Abstract:  "The development of brain-inspired neuromorphic computing architectures as a paradigm for Artificial Intelligence (AI) at the edge is a candidate solution that can meet strict energy and cost reduction constraints in the Internet of Things (IoT) application areas. Toward this goal, we present μBrain: the first digital yet fully event-driven without clock architecture, with co-lo... » read more

Enablers And Barriers For Connecting Diverse Data
By Anne Meixner - 09 Nov, 2021 - Comments: 0

More data is being collected at every step of the manufacturing process, raising the possibility of combining data in new ways to solve engineering problems. But this is far from simple, and combining results is not always possible. The semiconductor industry’s thirst for data has created oceans of it from the manufacturing process. In addition, semiconductor designs large and small now ha... » read more

40 GHz VCO and Frequency Divider in 28 nm FD-SOI CMOS Technology for Automotive Radar Sensors
By Technical Paper Link - 31 Aug, 2021 - Comments: 0

Abstract: "This paper presents a 40 GHz voltage-controlled oscillator (VCO) and frequency divider chain fabricated in STMicroelectronics 28 nm ultrathin body and box (UTBB) fully depleted silicon-on-insulator (FD-SOI) complementary metal-oxide–semiconductor (CMOS) process with eight metal layers back-end-of-line (BEOL) option. VCOs architecture is based on an LC-tank with p-type metal-oxide�... » read more

Plasma processing for advanced microelectronics beyond CMOS
By Technical Paper Link - 27 Aug, 2021 - Comments: 0

N. Marchack, L. Buzi, D. B. Farmer, H. Miyazoe, J. M. Papalia, H. Yan, G. Totir, and S. U. Engelmann , "Plasma processing for advanced microelectronics beyond CMOS", Journal of Applied Physics 130, 080901 (2021) https://doi.org/10.1063/5.0053666 ABSTRACT "The scientific study of plasma discharges and their material interactions has been crucial to the development of semiconductor process en... » read more

Bonding Issues For Multi-Chip Packages
By Katherine Derbyshire - 19 Nov, 2020 - Comments: 1

The rising cost and complexity of developing chips at the most advanced nodes is forcing many chipmakers to begin breaking up that chip into multiple parts, not all of which require leading edge nodes. The challenge is how to put those disaggregated pieces back together. When a complex system is integrated monolithically — on a single piece of silicon — the final product is a compromise ... » read more

Graphene and two-dimensional materials for silicon technology
By Technical Paper Link - 02 Oct, 2020 - Comments: 1

Abstract: "The development of silicon semiconductor technology has produced breakthroughs in electronics—from the microprocessor in the late 1960s to early 1970s, to automation, computers and smartphones—by downscaling the physical size of devices and wires to the nanometre regime. Now, graphene and related two-dimensional (2D) materials offer prospects of unprecedented advances in device ... » read more

Speeding Up Process Optimization With Virtual Processing
By Coventor - 16 Jul, 2020 - Comments: 0

Advanced CMOS scaling and new memory technologies have introduced increasingly complex structures into the device manufacturing process. For example, the increase in NAND memory layers has achieved greater vertical NAND scaling and higher memory density, but has led to challenges in high aspect ratio etch patterning and foot print scaling issues. Unique integration and patterning schemes have b... » read more

Week In Review: Auto, Security, Pervasive Computing
By Susan Rambo - 13 Mar, 2020 - Comments: 0

AI, machine learning Cadence says it has optimized its Tensilica HiFi digital signal processor IP to efficiently execute TensorFlow Lite for Microcontrollers, which are used in Google’s machine learning platform for edge. This means developers of AI/ML on the edge systems can now put better audio processing on edge devices with ML applications like keyword detection, audio scene detection, n... » read more

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