Chip Industry Technical Paper Roundup: Oct. 1


New technical papers recently added to Semiconductor Engineering’s library: [table id=360 /] More ReadingTechnical Paper Library home » read more

Dualtronics: Photonic Devices on the Cation Face and Electronic Devices on the Anion Face of the Same Wafer


A new technical paper titled "Using both faces of polar semiconductor wafers for functional devices" was published by researchers at Cornell University and Polish Academy of Sciences. Find the technical paper here. Published September 2024. Cornell University's news release is here, stating "Cornell researchers, in collaboration with a team at the Polish Academy of Sciences, have develope... » read more

Chip Industry Week in Review


The Biden-Harris Administration announced preliminary terms with HP for $50 million in direct funding under the CHIPs and Science Act to support the expansion and modernization of HP’s existing microfluidics and microelectromechanical systems (“MEMS”) facility in Corvallis, Oregon. CHIPS for America launched the CHIPS Metrology Community, a collaborative initiative designed to advance ... » read more

Research Bits: June 25


Quantum on silicon Researchers at the Harvard John A. Paulson School of Engineering and Applied Sciences (SEAS) developed a platform to probe and control qubits in silicon for quantum networks, after an earlier discovery that defects in silicon could be used to send and store quantum information over widely used telecommunications wavelengths. The device uses an electric diode to manipulate... » read more

Research Bits: June 4


Ultra-pure silicon Researchers from the University of Manchester and University of Melbourne developed a technique to engineer ultra-pure silicon that could be used in the construction of high-performance qubit devices that extend quantum coherence times. The highly purified silicon chips house and protect the qubits so they can sustain quantum coherence much longer, enabling complex calcul... » read more

Research Bits: May 28


Nanofluidic memristive neural networks Engineers from EPFL developed a functional nanofluidic memristive device that relies on ions, rather than electrons and holes, to compute and store data. “Memristors have already been used to build electronic neural networks, but our goal is to build a nanofluidic neural network that takes advantage of changes in ion concentrations, similar to living... » read more

Chip Industry Technical Paper Roundup: April 30


These new technical papers were recently added to Semiconductor Engineering’s library. [table id=222 /] Find more technical papers here. » read more

Chip Industry Week In Review


SK hynix and TSMC plan to collaborate on HBM4 development and next-generation packaging technology, with plans to mass produce HBM4 chips in 2026. The agreement is an early indicator for just how competitive, and potentially lucrative, the HBM market is becoming. SK hynix said the collaboration will enable breakthroughs in memory performance with increased density of the memory controller at t... » read more

Imaging of Coupled Film-Substrate Elastodynamics During an Insulator-to-Metal Transition (Penn State, et al.)


A new technical paper titled "In-Operando Spatiotemporal Imaging of Coupled Film-Substrate Elastodynamics During an Insulator-to-Metal Transition" was published by researchers at Pennsylvania State University, Cornell University, Argonne National Lab, Georgia Tech and Forschungsverbund Berlin. Abstract "The drive toward non-von Neumann device architectures has led to an intense focus on ins... » read more

Research Bits: April 16


Tunable thermal conductivity in memristors Researchers from the Center for Research in Biological Chemistry and Molecular Materials (CiQUS) and Forschungszentrum Juelich discovered that oxide-based memristive devices can demonstrate tunable thermal conductivity. Alongside the memristor's electrical resistive switching, a thermal resistive switching effect also occurs at the metal-oxide inte... » read more

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