tag: Coventor

Impact Of EUV Resist Thickness On Local Critical Dimension Uniformities For <30nm CD Via Patterning
By Coventor - 21 Oct, 2020 - Comments: 0

This paper describes the impact of extreme ultraviolet (EUV) resist thickness on <30 nm via local critical dimension uniformity (LCDU) measured during after development inspection (ADI) and after etch inspection (AEI). For the same post-etch CD targets, increasing resist thickness from 40 to 60 nm helped reduced CD variability. This work was performed via virtual fabrication using Coventor�... » read more

Building Predictive And Accurate 3D Process Models
By Pradeep Nanja - 21 Sep, 2020 - Comments: 0

Process engineers and integrators can use virtual process modeling to test alternative process schemes and architectures without relying on wafer-based testing. One important aspect of building an accurate process model is to ensure that the model is calibrated. Having a calibrated model is important, since it provides assurance to the process integrators and engineers that the model will refle... » read more

Momentum Builds For Advanced Packaging
By Mark LaPedus - 17 Sep, 2020 - Comments: 0

The semiconductor industry is stepping up its efforts in advanced packaging, an approach that is becoming more widespread with new and complex chip designs. Foundries, OSATs and others are rolling out the next wave of advanced packaging technologies, such as 2.5D/3D, chiplets and fan-out, and they are developing more exotic packaging technologies that promise to improve performance, reduce p... » read more

Process Model Calibration: Building Predictive And Accurate 3D Process Models
By Coventor - 16 Sep, 2020 - Comments: 0

The semiconductor industry has always faced challenges caused by device scaling, architecture evolution and process complexity and integration. These challenges are coupled with a need to provide new technology to the market quickly. In the initial stages of semiconductor technology development, innovative process flow schemes must be tested using silicon test wafers. These wafer tests are leng... » read more

Understanding Advanced Packaging Technologies And Their Impact On The Next Generation Of Electronics
By Sandy Wen - 28 Aug, 2020 - Comments: 2

Chip packaging has expanded from its conventional definition of providing protection and I/O for a discrete chip to encompassing a growing number of schemes for interconnecting multiple types of chips. Advanced packaging has become integral to embedding increased functionality into a variety of electronics, such as cellular phones and self-driving vehicles, by supporting high device density in ... » read more

Process Model Calibration: Building Predictive and Accurate 3D Process Models
By Coventor - 20 Aug, 2020 - Comments: 0

The semiconductor industry has always faced challenges caused by device scaling, architecture evolution and process complexity and integration. These challenges are coupled with a need to provide new technology to the market quickly. In the initial stages of semiconductor technology development, innovative process flow schemes must be tested using silicon test wafers. These wafer tests are leng... » read more

Next Challenge: Parts Per Quadrillion
By Ed Sperling - 29 Jul, 2020 - Comments: 0

Requirements for purity of the materials used in semiconductor manufacturing are being pushed to unprecedented — and increasingly unprovable — levels as demand for reliability in chips over increasingly longer lifetimes continues to rise. And while this may seem like a remote problem for many parts of the supply chain, it can affect everything from availability of materials needed to make t... » read more

Week In Review: Manufacturing, Test
By Mark LaPedus - 24 Jul, 2020 - Comments: 0

Semicon recap The virtual version of Semicon West took place this week. Virtual events have their places. It’s no substitute for an in-person event. Nonetheless, the virtual version of Semicon West is still a place to get an update on the latest equipment, test and packaging technologies. It is also interesting to visit the virtual booths. It’s a fast way to meet people. I chatted with ... » read more

Semicon West Day One/Two
By Mark LaPedus - 22 Jul, 2020 - Comments: 0

For years, the semiconductor and equipment industry has congregated at the annual Semicon West trade show in San Francisco. It’s an event to get an update on the latest equipment, test and packaging technologies. It’s also a good way to meet with people who you haven’t seen in a year, if not longer. It’s a great way to get a pulse on the industry. Needless to say, Semicon is a vir... » read more

Semiconductor Memory Evolution And Current Challenges
By Michael Hargrove - 16 Jul, 2020 - Comments: 0

The very first all-electronic memory was the Williams-Kilburn tube, developed in 1947 at Manchester University. It used a cathode ray tube to store bits as dots on the screen’s surface. The evolution of computer memory since that time has included numerous magnetic memory systems, such as magnetic drum memory, magnetic core memory, magnetic tape drive, and magnetic bubble memory. Since the 19... » read more

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