tag: CWE

Automating The Detection of Hardware Common Weakness Enumerations In Early Design
By Technical Paper Link - 12 Oct, 2022 - Comments: 0

A new technical paper titled "Don't CWEAT It: Toward CWE Analysis Techniques in Early Stages of Hardware Design" was published by researchers at NYU, Intel, Duke and University of Calgary. "To help prevent hardware security vulnerabilities from propagating to later design stages where fixes are costly, it is crucial to identify security concerns as early as possible, such as in RTL designs. ... » read more

Design For Security Now Essential For Chips, Systems
By Ann Mutschler - 01 Sep, 2022 - Comments: 0

It's nearly impossible to create a completely secure chip or system, but much can be done to raise the level of confidence about that security. In the past, security was something of an afterthought, disconnected from the architecture and added late in the design cycle. But as chips are used increasingly in safety- and mission-critical systems, and as the value of data continues to rise, the... » read more

Chip Backdoors: Assessing the Threat
By Jeff Goldman - 04 Aug, 2022 - Comments: 0

In 2018, Bloomberg Businessweek made an explosive claim: Chinese spies had implanted backdoors in motherboards used by some high-profile customers, including the U.S. Department of Defense. All of those customers issued strongly worded denials. Most reports of hardware backdoors have ended up in exchanges like these. There are allegations and counter-allegations about specifics. But as hardw... » read more

Is Standardization Required For Security?
By Ann Mutschler - 04 Aug, 2022 - Comments: 1

Semiconductor Engineering sat down to discuss chip and system security with Mike Borza, fellow and scientist on the security IP team at Synopsys; Lee Harrison, automotive IC test solutions manager at Siemens Digital Industries Software; Jason Oberg, founder and CTO of Cycuity (formerly Tortuga Logic); Nicole Fern, senior security analyst at Riscure; Norman Chang, fellow and CTO of the electroni... » read more

Protecting ICs Against Specific Threats
By Ed Sperling - 18 May, 2022 - Comments: 0

Identifying potential vulnerabilities and attack vectors is a first step in addressing them. Anders Nordstrom, security application engineer at Tortuga Logic, talks with Semiconductor Engineering about the growing risk of remote hardware attacks, what to do when a chip is hacked, and where to find the most common weaknesses for chips. » read more

Building Security Into ICs From The Ground Up
By John Koon - 05 May, 2022 - Comments: 0

Cyberattacks are becoming more frequent and more sophisticated, but they also are starting to compromise platforms that until recently were considered unbreakable. Consider blockchains, for example, which were developed as secure, distributed ledger platforms. All of them must be updated with the same data for a transaction to proceed. But earlier this year a blockchain bridge platform calle... » read more

Hardware-Supported Patching of Security Bugs in Hardware IP Blocks
By Technical Paper Link - 22 Apr, 2022 - Comments: 0

New research paper from Duke University, University of Calgary, NYU & Intel. Abstract: "To satisfy various design requirements and application needs, designers integrate multiple Intellectual Property blocks (IPs) to produce a system-on-chip (SoC). For improved survivability, designers should be able to patch the SoC to mitigate potential security issues arising from hardware IPs; for incre... » read more

Common Weakness Enumeration
By Ed Sperling - 06 Apr, 2022 - Comments: 0

Understanding potential design vulnerabilities up front can help prevent future cyberattacks. Jason Oberg, CTO at Tortuga Logic, talks with Semiconductor Engineering about why CWE is so important, when it needs to be considered, and why no hardware design is completely bulletproof. » read more

Verifying Side-Channel Security Pre-Silicon
By Bryon Moyer - 03 Mar, 2022 - Comments: 1

As security grows in importance, side-channel attacks pose a unique challenge because they rely on physical phenomena that aren’t always modeled for the design verification process. While everything can be hacked, the goal is to make it so difficult that an attacker concludes it isn't worth the effort. For side-channel attacks, the pre-silicon design is the best place to address any known ... » read more

Hardware Security Optimization With MITRE CWE
By Anders Nordstrom - 03 Mar, 2022 - Comments: 0

Whether you’re just starting to build out a hardware security program at your organization, or you’re looking to optimize existing hardware security processes, the MITRE Common Weakness Enumeration (CWE) database is an excellent resource to keep in your toolbox. What is CWE? A CWE is a type of vulnerability, or flaw, in the design of either hardware or software in embedded systems. Indi... » read more

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