tag: CXL

Improving Power & Performance Beyond Scaling
By Ed Sperling - 16 Jun, 2021 - Comments: 0

Steven Woo, Rambus fellow and distinguished inventor, discusses architectural changes inside of servers and data centers to allow pooling of resources such as memory. That has a big impact on power efficiency and overall performance, but it also allows data centers to customize their architectures and prioritized resources with much more granularity than they can do today. » read more

Accelerate Adoption Of High-Speed, Low-Latency, Cache-Coherent Standards Using Formal Verification
By Cadence - 09 Jun, 2021 - Comments: 0

We continue to see huge growth in data and compute demand, fueled by increased global data traffic with the 5G rollout, the prevalence of streaming services, and expanded artificial intelligence and machine learning (AI/ML) applications. Several new industry-standard specifications have emerged in recent years to define the protocols of the underlying electronic components and IP building block... » read more

Safeguarding Data Over PCIe & CXL In Data Centers
By Dana Neustadter - 01 Apr, 2021 - Comments: 0

As more devices enter the market and drive exponential growth of data in the cloud, cloud computing is going through a significant overhaul. The increasing presence of “hyperscale” cloud providers for big data and analytics, 5G for rapid IoT connectivity, and the wide use of AI for natural data processing and for extracting insights are compounding both the amount of connected data and the ... » read more

Waiting For Chiplet Standards
By Brian Bailey - 25 Mar, 2021 - Comments: 2

The need and desire for chiplets is increasing, but for most companies that shift will happen slowly until proven standards are in place. Interoperability and compatibility depend on many layers and segments of the supply chain coming to agreement. Unfortunately, fragmented industry requirements may lead to a plethora of solutions. Standards always have enabled increasing specialization. ... » read more

CXL: Sorting Out The Interconnect Soup
By Tim Messegee - 11 Feb, 2021 - Comments: 0

In the webinar Hidden Signals: Memory and Interconnect Decisions for AI, IoT and 5G, Shane Rau of IDC and Rambus Fellow Steven Woo discussed how interconnects were a critical enabling technology for future computing platforms. One of the major complications was the “interconnect soup” of numerous and divergent interface protocols. The Compute Express Link (CXL) standard offers to sort out m... » read more

Usage Models Driving Data Center Architecture Changes
By Ann Mutschler - 11 Feb, 2021 - Comments: 0

Data center architectures are undergoing a significant change, fueled by more data and much greater usage from remote locations. Part of this shift involves the need to move some processing closer to the various memory hierarchies, from SRAM to DRAM to storage. There is more data to process, and it takes less energy and time to process that data in place. But workloads also are being distrib... » read more

Week In Review: Design, Low Power
By Jesse Allen - 29 Jan, 2021 - Comments: 0

The CXL Consortium published the Compute Express Link 2.0 specification. CXL is an interconnect that maintains memory coherency between the CPU memory space and memory on attached devices. CXL 2.0 adds support for switching for fan-out to connect to more devices, memory pooling for increased memory utilization efficiency and providing memory capacity on demand, and support for persistent memory... » read more

Data Overload In The Data Center
By Ed Sperling - 25 Jan, 2021 - Comments: 0

Dealing with increasing volumes of data inside of data centers requires an understanding of architectures, the flow of data between memory and processors, bandwidth, cache coherency and new memory types and interfaces. Gary Ruggles, senior product marketing manager at Synopsys, talks about how these systems are being revamped to improve performance and reduce power. » read more

Week In Review: Design, Low Power
By Jesse Allen - 04 Dec, 2020 - Comments: 0

Xilinx acquired the assets of Falcon Computing Solutions, a provider of high-level synthesis (HLS) compiler optimization technology for hardware acceleration of software applications. The acquisition will be integrated into the Xilinx Vitis Unified Software Platform to automate hardware-aware optimizations of C++ applications with minimal hardware expertise. “Our compiler provides a high degr... » read more

Week In Review: Design, Low Power
By Jesse Allen - 13 Nov, 2020 - Comments: 0

M&A Synopsys acquired Moortec, a provider of in-chip monitoring technology specializing in process, voltage and temperature (PVT) sensors. Moortec's sensors will be a key component to Synopsys' new Silicon Lifecycle Management (SLM) platform. "This acquisition accelerates the expansion of our SLM platform by providing our customers with a comprehensive data-analytics-driven solution for de... » read more

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