Blog Review: May 26

By Jesse Allen - 26 May, 2021 - Comments: 0

Cadence's Paul McLellan checks out challenges in designing processors for AI applications, the explosion in the number of weights used to language processing, and the current state of training and inference hardware. Synopsys' Mike Gianfagna explores how hyper-convergent design will push device capabilities through integration of multiple technologies, multiple protocols, and multiple archit... » read more

Demand, Lead Times Soar For 300mm Equipment

By Mark LaPedus - 20 May, 2021 - Comments: 0

A surge in demand for various chips is causing select shortages and extended lead times for many types of 300mm semiconductor equipment, photomask tools, wafers, and other products. For the last several years, 200mm equipment has been in short supply in the market, but issues are now cropping up throughout the 300mm supply chain, as well. Traditionally, lead times have been three to six mont... » read more

Is The Photomask Ecosystem Ready For Curvilinear ILT?

By Jan Willis - 18 May, 2021 - Comments: 0

The time it takes to write a photomask with curvilinear shapes was a major historical barrier to adoption inverse lithography technology (ILT), as discussed in the second installment of our blog series on curvilinear mask shapes. After years of development, multi-beam mask writers came into production and one of their features is the ability to write curvilinear masks without a write time penal... » read more

What’s Next In Fab Tool Technologies?

By Mark LaPedus - 12 May, 2021 - Comments: 0

Experts at the Table: Semiconductor Engineering sat down to discuss extreme ultraviolet (EUV) lithography and other next-generation fab technologies with Jerry Chen, head of global business development for manufacturing & industrials at Nvidia; David Fried, vice president of computational products at Lam Research; Mark Shirey, vice president of marketing and applications at KLA; and Aki Fuj... » read more

How Extensively Will Curvilinear ILT Be Used For EUV Photomasks?

By Jan Willis - 29 Apr, 2021 - Comments: 0

Curvilinear shapes on photomasks lead to improved process windows, as the first installment of this blog series discussed. Our blog series continues with a video panel discussion of the benefits that curvilinear shapes have for EUV photomasks (masks) and whether curvilinear shapes will be used beyond today’s usage for hotspots. Our panellists approached the question of curvilinear ILT for ... » read more

Foundry Wars Begin

By Mark LaPedus - 19 Apr, 2021 - Comments: 3

Leading-edge foundry vendors are gearing up for a new, high-stakes spending and technology race, setting the stage for a possible shakeup across the semiconductor manufacturing landscape. In March, Intel re-entered the foundry business, positioning itself against Samsung and TSMC at the leading edge, and against a multitude of foundries working at older nodes. Intel announced plans to build ... » read more

The Quest For Curvilinear Photomasks

By Mark LaPedus - 15 Apr, 2021 - Comments: 1

The semiconductor industry is making noticeable progress on the development of advanced curvilinear photomasks, a technology that has broad implications for chip designs at the most advanced nodes and the ability to manufacture those chips faster and cheaper. The question now is when will this technology move beyond its niche-oriented status and ramp up into high-volume manufacturing. For ye... » read more

How Do Multi-Beam Mask Writers Enable Curvilinear Shapes On Photomasks?

By Jan Willis - 15 Apr, 2021 - Comments: 0

Multi-beam mask writing was identified as one of the ways to eliminate hurdles to manufacturing curvilinear mask shapes in the last installment of this blog. Our blog series continues with an educational video explanation of why and how multi-beam writers reduce write time for curvilinear mask shapes that took place during an eBeam Initiative panel discussion with industry experts during the 20... » read more

Applications, Challenges For Using AI In Fabs

By Mark LaPedus - 14 Apr, 2021 - Comments: 0

Experts at the Table: Semiconductor Engineering sat down to discuss chip scaling, transistors, new architectures, and packaging with Jerry Chen, head of global business development for manufacturing & industrials at Nvidia; David Fried, vice president of computational products at Lam Research; Mark Shirey, vice president of marketing and applications at KLA; and Aki Fujimura, CEO of D2S. Wh... » read more

AI In Inspection, Metrology, And Test

By Susan Rambo And Ed Sperling - 06 Apr, 2021 - Comments: 0

AI/ML is creeping into multiple processes within the fab and packaging houses, although not necessarily for the purpose it was originally intended. The chip industry is just beginning to learn where AI makes sense and where it doesn't. In general, AI works best as a tool in the hands of someone with deep domain expertise. AI can do certain things well, particularly when it comes to pattern m... » read more

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Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

by Bryon Moyer

tag: D2S