Week In Review: Design, Low Power

By Jesse Allen - 23 Jul, 2021 - Comments: 0

Tools Cadence unveiled Cerebrus Intelligent Chip Explorer, a new machine learning-based tool to drive the Cadence RTL-to-signoff implementation flow. The tool aims to use reinforcement learning to find flow solutions that otherwise might not be explored and applies models to future designs. The company says it can improve productivity up to 10X and PPA up to 20% with optimization of the flow f... » read more

Piecing Together Chiplets

By Mark LaPedus - 22 Jul, 2021 - Comments: 3

Several companies are implementing the chiplet model as a means to develop next-generation 3D-like chip designs, but this methodology still has a long way to go before it becomes mainstream for the rest of the industry. It takes several pieces to bring up a 3D chip design using the chiplet model. A few large players have the pieces, though most are proprietary. Others are missing some key co... » read more

Manufacturing Bits: June 22

By Mark LaPedus - 22 Jun, 2021 - Comments: 1

5G metasurface antennas At the recent 2021 IEEE 71st Electronic Components and Technology Conference (ECTC), the Institute of Microelectronics of the Chinese Academy of Sciences (CAS) presented a paper on a low-profile broadband metasurface antenna for 5G antenna-in-package applications. The National Center for Advanced Packaging and the University of Chinese Academy of Sciences also contri... » read more

Manufacturing Bits: June 1

By Mark LaPedus - 01 Jun, 2021 - Comments: 0

Frozen finFETs The Defense Advanced Research Projects Agency (DARPA) has launched the Low Temperature Logic Technology (LTLT) program, an effort to develop finFETs that operate at temperatures close to liquid nitrogen (~77K or minus 321 degrees Fahrenheit). The goal of LTLT is to develop low-temperature finFET transistors at the 14nm node and below by making modifications to the manufacturi... » read more

Continuing Challenges For Open-Source Verification

By Brian Bailey - 01 Jun, 2021 - Comments: 1

Experts at the Table: This is the last part of the series of articles derived from the DVCon panel that discussed Verification in the Era of Open Source. It takes the discussion beyond what happened in the panel and utilizes some of the questions that were posed, but never presented to the panelists due to lack of time. Contributing to the discussion are Ashish Darbari, CEO of Axiomise; Serge L... » read more

Scaling Simulation

By Brian Bailey - 27 May, 2021 - Comments: 1

Without functional simulation the semiconductor industry would not be where it is today, but some people in the industry contend it hasn't received the attention and research it deserves, causing a stagnation in performance. Others disagree, noting that design sizes have increased by orders of magnitude while design times have shrunk, pointing to simulation remaining a suitable tool for the job... » read more

Standards, Open Source, and Tools

By Brian Bailey - 10 May, 2021 - Comments: 1

Experts at the Table: Semiconductor Engineering discussed what open source verification means today and what it should evolve into with Jean-Marie Brunet, senior director for the Emulation Division at Siemens EDA; Ashish Darbari, CEO of Axiomise; Simon Davidmann, CEO of Imperas Software; Serge Leef, program manager in the Microsystems Technology Office at DARPA; Tao Liu, staff hardware engineer... » read more

New Methodologies Create New Opportunities

By Brian Bailey - 27 Apr, 2021 - Comments: 0

Experts at the Table: Semiconductor Engineering sat down to discuss what open source verification means today and what it should evolve into, with Jean-Marie Brunet, senior director for the Emulation Division at Siemens EDA; Ashish Darbari, CEO of Axiomise; Simon Davidmann, CEO of Imperas Software; Serge Leef, program manager in the Microsystems Technology Office at DARPA; Tao Liu, staff hardwa... » read more

Week In Review: Design, Low Power

By Jesse Allen - 23 Apr, 2021 - Comments: 0

Skyworks Solutions will acquire Silicon Labs' Infrastructure & Automotive (I&A) business for $2.75 billion cash. The transaction includes Silicon Labs' power/isolation, timing and broadcast products, intellectual property, and approximately 350 employees. Silicon Labs said it will focus on its IoT business, which includes integrated hardware and software wireless platforms for multiple ... » read more

Week In Review: Design, Low Power

By Jesse Allen - 02 Apr, 2021 - Comments: 0

Magnachip will be acquired by Wise Road Capital for $1.4 billion, taking the NYSE-listed company private. The company designs and manufactures OLED display driver ICs and a range of power management discretes and ICs. Magnachip's management team and employees are expected to continue in their roles, and the company will remain based in Cheongju, Seoul, and Gumi, South Korea. The all-cash transa... » read more

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Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

by Bryon Moyer

tag: DARPA

Week In Review: Design, Low Power

Piecing Together Chiplets

Manufacturing Bits: June 22

Manufacturing Bits: June 1

Continuing Challenges For Open-Source Verification

Scaling Simulation

Standards, Open Source, and Tools

New Methodologies Create New Opportunities

Week In Review: Design, Low Power

Week In Review: Design, Low Power