Distilling The Essence Of Four DAC Keynotes


Chip design and verification are facing a growing number of challenges. How they will be solved — particularly with the addition of machine learning — is a major question for the EDA industry, and it was a common theme among four keynote speakers at this month's Design Automation Conference. DAC has returned as a live event, and this year's keynotes involved the leaders of a systems comp... » read more

SpZip: Architectural Support for Effective Data Compression In Irregular Applications


Technical paper link is here. Published in: 2021 ACM/IEEE 48th Annual International Symposium on Computer Architecture (ISCA) Yifan Yang (MIT); Joel Emer (MIT / NVIDIA); Daniel Sanchez (MIT) Abstract: "Irregular applications, such as graph analytics and sparse linear algebra, exhibit frequent indirect, data-dependent accesses to single or short sequences of elements that cause high ma... » read more

Compressing Datasets Created During Silicon Design


Authors: Guru Rao, Distinguished Engineer; Shakir Abbas, Software Engineering Group Director; Mohammad Mirfendereski, Configuration Management Architect; Cadence. Harsh Sharangpani, CEO and CTO; Rajesh Patil, VP-Business Development; Ascava. During the design cycle for modern semiconductor components, a very large amount of data is generated and stored, often accumulating to hundreds of tera... » read more

System Bits: Feb. 6


Compressing data in vehicles As the number of cameras in automobiles is on the rise with the move to autonomous vehicles, internal vehicle networks are being pushed to their limits from the flood of data. While special compression methods reduce the amount of video data, they also exhibit a high degree of latency for coding. But now, Fraunhofer researchers have adapted video compression in su... » read more