Distilling The Essence Of Four DAC Keynotes

By Brian Bailey - 28 Jul, 2022 - Comments: 0

Chip design and verification are facing a growing number of challenges. How they will be solved — particularly with the addition of machine learning — is a major question for the EDA industry, and it was a common theme among four keynote speakers at this month's Design Automation Conference. DAC has returned as a live event, and this year's keynotes involved the leaders of a systems comp... » read more

SpZip: Architectural Support for Effective Data Compression In Irregular Applications

By Technical Paper Link - 11 Aug, 2021 - Comments: 0

Technical paper link is here. Published in: 2021 ACM/IEEE 48th Annual International Symposium on Computer Architecture (ISCA) Yifan Yang (MIT); Joel Emer (MIT / NVIDIA); Daniel Sanchez (MIT) Abstract: "Irregular applications, such as graph analytics and sparse linear algebra, exhibit frequent indirect, data-dependent accesses to single or short sequences of elements that cause high ma... » read more

Compressing Datasets Created During Silicon Design

By Cadence - 23 Oct, 2019 - Comments: 0

Authors: Guru Rao, Distinguished Engineer; Shakir Abbas, Software Engineering Group Director; Mohammad Mirfendereski, Configuration Management Architect; Cadence. Harsh Sharangpani, CEO and CTO; Rajesh Patil, VP-Business Development; Ascava. During the design cycle for modern semiconductor components, a very large amount of data is generated and stored, often accumulating to hundreds of tera... » read more

System Bits: Feb. 6

By Ann Mutschler - 06 Feb, 2018 - Comments: 0

Compressing data in vehicles As the number of cameras in automobiles is on the rise with the move to autonomous vehicles, internal vehicle networks are being pushed to their limits from the flood of data. While special compression methods reduce the amount of video data, they also exhibit a high degree of latency for coding. But now, Fraunhofer researchers have adapted video compression in su... » read more

Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

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NAND Flash Targets 1,000 Layers

New techniques go beyond improved deposition and etching, but challenges stack up, too.

by Bryon Moyer

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

by Bryon Moyer

tag: data compression

Distilling The Essence Of Four DAC Keynotes

SpZip: Architectural Support for Effective Data Compression In Irregular Applications

Compressing Datasets Created During Silicon Design

System Bits: Feb. 6