Efficient Data Transfer With High-Speed Serial Flash Interface IP

By Synopsys - 06 Apr, 2022 - Comments: 0

Technology advancement and increasing data transfer rate, have made serial flash memories widely popular to store data on off-chip locations. Traditionally, flash memory devices use a primary controller to interface with the CPU and get the data from the memory device. For large amounts of data, the communication with the CPU is mostly performed by the external Direct Memory Access (DMA) contro... » read more

Cataloging IP In The Enterprise

By Ed Sperling - 22 Mar, 2022 - Comments: 0

Many companies have no way of documenting where IP they license is actually used, which version of that IP is being utilized, and whether that license extends to other projects or even to their customers. Pedro Pires, applications engineer at ClioSoft, looks at how IP currently is cataloged, why it’s been so difficult to do this in the past, and how AI can be used to speed up and simplify thi... » read more

The Importance Of Layering Data

By Ed Sperling - 11 Jan, 2022 - Comments: 0

The chip industry generates enormous quantities of data, from design through manufacturing, but much of it is unavailable or incomplete. And even when and where it is available, it is frequently under-utilized. While there has been much work done in terms of establishing traceability and data formats, the cross-pollination of data between companies and between equipment makers at various pro... » read more

Data Tsunami Pushes Boundaries Of IC Interconnects

By Ann Mutschler - 22 Sep, 2021 - Comments: 0

Rapid increases in machine-generated data are fueling demand for higher-performance multi-core computing, forcing design teams to rethink the movement of data on-chip, off-chip, and between chips in a package. In the past, this was largely handled by the on-chip interconnects, which often were a secondary consideration in the design. But with the rising volumes of data in markets ranging fro... » read more

Tradeoffs Between Edge Vs. Cloud

By Brian Bailey - 09 Sep, 2021 - Comments: 0

Increasing amounts of processing are being done on the edge, but how the balance will change between what's computed in the cloud versus the edge remains unclear. The answer may depend as much on the value of data and other commercial reasons as on technical limitations. The pendulum has been swinging between doing all processing in the cloud to doing increasing amounts of processing at the ... » read more

Designing Chips For Test Data

By Ed Sperling - 10 Aug, 2021 - Comments: 0

Collecting data to determine the health of a chip throughout its lifecycle is becoming necessary as chips are used in more critical applications, but being able to access that data isn't always so simple. It requires moving signals through a complex, sometimes unpredictable, and often hostile environment, which is a daunting challenge under the best of conditions. There is a growing sense of... » read more

Who Owns In-Chip Monitoring Data?

By Bryon Moyer - 10 Aug, 2021 - Comments: 1

In-chip monitors provide unprecedented visibility into the inner workings of complex integrated circuits for everything from process control to fine binning, preventive system maintenance, and failure analysis. But there may be many consumers of different slices of the data at very different phases of the chip lifecycle, raising questions about who controls and owns all of that data. The ans... » read more

Changes In Auto Architectures

By Ed Sperling - 04 Aug, 2021 - Comments: 0

Automotive architectures are changing from a driver-centric model to one where technology supplements and in some cases replaces the driver. Hans Adlkofer, senior vice president and head of the Automotive Systems Group at Infineon, looks at the different levels of automation in a vehicle, what’s involved in the shift from domain to zonal architectures, why a mix of processors will be required... » read more

Sensor Fusion Everywhere

By Ed Sperling - 19 Jul, 2021 - Comments: 0

How do you distinguish between background noise and the sound of an intruder breaking glass? David Jones, head of marketing and business development for intuitive sensing solutions at Infineon, looks at what types of sensors are being developed, what happens when different sensors are combined, what those sensors are being used for today, and what they will be used for in the future. » read more

Sharing Secure Chip Data For Analytics

By Anne Meixner - 06 Apr, 2021 - Comments: 0

New approaches and standards are being developed to securely share manufacturing and test data across the supply chain, moves that have long been considered critical to the reliability of end devices and faster time to yield and profitability. It will take time before these methods become widespread in the IC supply chain. But there is increasing agreement these kinds of measures are essenti... » read more

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Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?