ETH Zurich Introduces ProTRR, in-DRAM Rowhammer Mitigation


New technical paper titled "PROTRR: Principled yet Optimal In-DRAM Target Row Refresh" from ETH Zurich. The paper was presented at the 43rd IEEE Symposium on Security and Privacy (SP 2022), San Francisco, CA, USA, May 22–26, 2022. This new paper introduces ProTRR, an "in-DRAM Rowhammer mitigation that is secure against FEINTING, a novel Rowhammer attack." The related video presentation can... » read more

Scaling DDR5 RDIMMs To 5600 MT/s


Looking forward to 2022, the first of the DDR5-based servers will hit the market with RDIMMs running at 4800 megatransfers per second (MT/s). This is a 50% increase in data rate over top-end 3200 MT/s DDR4 RDIMMs in current high-performance servers. DDR5 memory incorporates a number of innovations, such as Decision Feedback Equalization (DFE), and a new DIMM architecture which enable that speed... » read more

Servers And The Drive to DDR5


This IDC Technology Spotlight Study, sponsored by Rambus, discusses server demands on DRAM and different workloads. DRAM must dynamically adjust to the needs of these disparate workloads. The history of dynamic random-access memory (DRAM) is characterized by the ability of the technology to adapt to the increasingly specialized real-time memory requirements of the applications that utilize it. ... » read more

Servers And The Drive To DDR5


This IDC Technology Spotlight Study, sponsored by Rambus, discusses server demands on DRAM and different workloads. DRAM must dynamically adjust to the needs of these disparate workloads. The history of dynamic random-access memory (DRAM) is characterized by the ability of the technology to adapt to the increasingly specialized real-time memory requirements of the applications that utilize it. ... » read more

Improving Power & Performance Beyond Scaling


Steven Woo, Rambus fellow and distinguished inventor, discusses architectural changes inside of servers and data centers to allow pooling of resources such as memory. That has a big impact on power efficiency and overall performance, but it also allows data centers to customize their architectures and prioritized resources with much more granularity than they can do today. » read more

Shifting Toward Data-Driven Chip Architectures


An explosion in data is forcing chipmakers to rethink where to process data, which are the best types of processors and memories for different types of data, and how to structure, partition and prioritize the movement of raw and processed data. New chips from systems companies such as Google, Facebook, Alibaba, and IBM all incorporate this approach. So do those developed by vendors like Appl... » read more

Data Center Evolution: DDR5 DIMMs Advance Server Performance


Driven by a confluence of megatrends, global data traffic is increasing at an exponential rate. For example, 5G networks are enabling billions of AI-powered IoT devices untethered from wired networks. Nowhere is the impact of all this growth being felt more intensely than in data centers. Indeed, hyperscale data centers have become the critical hubs of the global data network. DDR5 DRAM will en... » read more

Data Overload In The Data Center


Dealing with increasing volumes of data inside of data centers requires an understanding of architectures, the flow of data between memory and processors, bandwidth, cache coherency and new memory types and interfaces. Gary Ruggles, senior product marketing manager at Synopsys, talks about how these systems are being revamped to improve performance and reduce power. » read more

Five Key Changes Coming With DDR5 DIMMs


On July 14th of last year, JEDEC announced the publication of the DDR5 SDRAM standard. This signaled the nearing industry transition to DDR5 server dual-inline memory modules (DIMM). DDR5 memory brings a number of key enhancements that will bring great performance and power benefits in next generation servers. Scaling Data Rates to 6.4 Gb/s You can never have enough memory bandwidth, and DD... » read more

Week In Review: Design, Low Power


Siemens will acquire Avatar Integrated Systems. The company's place-and-route tools, which will become part of Mentor's Xcelerator portfolio, include a netlist-to-GDS full-function block-level physical implementation tool and a complete top-level prototyping, floor-planning and chip assembly tool. Based in Santa Clara, CA, Avatar was formed in 2017 from the acquired assets of ATopTech. ATopTech... » read more

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