tag: DSA

Manufacturing Bits: March 10
By Mark LaPedus - 10 Mar, 2015 - Comments: 0

Hi-tech pens The University of California at San Diego has developed a hi-tech ballpoint pen. Researchers have taken off-the-shelf ballpoint pens and filled them with bio inks. With so-called enzymatic-ink-based roller pens, users are able to draw biocatalytic sensors on a surface. [caption id="attachment_18297" align="alignleft" width="300"] Researchers draw sensors capable of detecting... » read more

More Lithography Options?
By Mark LaPedus - 03 Mar, 2015 - Comments: 1

Lithographers face some tough decisions at 10nm and beyond. At these nodes, IC makers are still weighing the various patterning options. And to make it even more difficult, lithographers could soon have some new, and potentially disruptive, options on the table. On one front, the traditional next-generation lithography (NGL) technologies are finally making some noticeable progress. For examp... » read more

Manufacturing Bits: March 3
By Mark LaPedus - 03 Mar, 2015 - Comments: 0

Nanoimprint consortium CEA-Leti has launched a nanoimprint lithography program in an effort to propel the technology in the marketplace. The imprint program, dubbed Inspire, will focus on various and emerging non-semiconductor applications, according to Laurent Pain, patterning program manager and business development manager within the Silicon Technologies division at the French R&D or... » read more

Manufacturing Bits: Feb. 24
By Mark LaPedus - 24 Feb, 2015 - Comments: 0

EUV progress report At the SPIE Advanced Lithography conference in San Jose, Calif., ASML Holding said that one customer, Taiwan Semiconductor Manufacturing Co. Ltd. (TSMC), has exposed more than 1,000 wafers on an NXE:3300B EUV system in a single day. This is one step towards the insertion of EUV lithography in volume production. During a recent test run on the system, TSMC exposed 1,022 w... » read more

How To Extend Litho Scaling
By Ann Mutschler - 19 Feb, 2015 - Comments: 0

IC mask [getkc id="80" comment="lithography"] today is sophisticated and complex. It's also a work in progress with a lot of unknowns as the industry struggles to increase productivity while reducing risk. The bulk of the work currently is focused on trying to figure out what would be a practical scheme for patterning lithography that could be used at 10nm and 7nm, said Gandharv Bhatara, Ca... » read more

Integrating DSA
By Katherine Derbyshire - 22 Dec, 2014 - Comments: 0

As previous articles in this series have shown, directed self-assembly may be a promising alternative for manufacturers seeking to shrink feature sizes in the face of a stalled exposure tool roadmap. It is simpler than some other frequency-multiplication techniques, can be implemented with existing equipment, and does not appear to introduce insurmountable defect issues of its own. Which does n... » read more

DSA Moves Ahead
By Katherine Derbyshire - 19 Dec, 2014 - Comments: 0

It can be difficult to make DSA structures other than uniform arrays. One solution is to print a grating over a large area, then use a “cut” mask to eliminate the unwanted features. The challenge, though, is that aligning the cut mask to an array of tightly spaced features, such as the fins for a FinFET transistor layer, can require extremely demanding overlay specifications. While reducing... » read more

Manufacturing Bits: Dec. 16
By Mark LaPedus - 16 Dec, 2014 - Comments: 0

Space DSA NASA's Physical Science Research Program is taking directed self-assembly (DSA) technology to new heights. On the International Space Station, astronauts are exploring the development of nanoparticles suspended in magnetorheolocial (MR) fluids. MR fluids, which are a new class of smart materials, self-assemble into shapes in the presence of a magnetic field. With the technology, r... » read more

Transistor Options Narrow For 7nm
By Mark LaPedus - 13 Nov, 2014 - Comments: 0

Chipmakers are currently ramping up silicon-based finFETs at the 16nm/14nm node, with plans to scale the same technology to 10nm. Now, the industry is focusing on the transistor options for 7nm and beyond. At one time, the leading contenders involved several next-generation transistor types. At present, the industry is narrowing down the options and one technology is taking a surprising lea... » read more

Counting And Controlling DSA Defects
By Katherine Derbyshire - 13 Nov, 2014 - Comments: 1

If directed self-assembly is to succeed in semiconductor manufacturing, [gettech id="31046" t_name="DSA"] processes must achieve defect rates in line with the stringent requirements of sub-20nm device nodes. So far, they haven’t. However, it’s not yet clear whether the high defect rates represent a real obstacle, or are simply part of the development of any new, immature process technology... » read more

← Older posts Newer posts →

  • Sponsors

About

Navigation

Connect With Us

Copyright ©2013-2024 SMG   |  Terms of Service  |  Privacy Policy