Why DSA Is Cost Effective For 7nm And Below


The upcoming 7nm process node presents tough challenges both for printability and cost. At 7nm and below, multi-patterning is required, which makes the manufacturing process more expensive by requiring more masks. To control costs, any alternative technology that provides equivalent yields with fewer patterning steps should be explored. One promising option is to use directed self-assembly (... » read more

5 Technologies To Watch


The industry is developing a dizzying array of new technologies. In fact, there are more new and innovative technologies than ever before. And the list is countless. At least from my vantage point, I have come up with my own list of the top five technologies to watch in 2015 and beyond. They are listed in alphabetical order. (See below). Obviously, there are more than just five technologi... » read more

3 Ways To Reload Moore’s Law


The electronics revolution has been enabled because the cost and power per transistor has decreased 30% per year for the last 30 years — a fact usually associated with Moore's Law. This has been accomplished by simply reducing the transistor size while offsetting increased costs of equipment and mask levels, and by increased productivity from improved yield, throughput and wafer size. This... » read more

Manufacturing Bits: May 26


Table-top EUV Swinburne University of Technology has developed a table-top extreme ultraviolet (EUV) laser power source. The source could be used to develop a system for use in metrology and other applications. The table-top setup is a new way to generate bright beams of coherent EUV radiation. It may offer a cost-effective alternative to large-scale facilities, such as synchrotrons or free... » read more

The Roadmap To 5nm


By Debra Vogler Among the challenges the semiconductor industry will be facing as it moves down the path to node 5 are resistance-capacitance (RC) management and integration. SEMI is pleased to announce a SEMICON West 2015 STS technical program exploring these and other high-volume manufacturing challenges. According to An Steegen, SVP of Process Technology at imec, the list of RC managemen... » read more

DSA Defects Continue Downward Trend


As previously discussed, the majority of defects in early directed self-assembly (DSA) processes were due to particles and other contaminants, and could be attributed to the immaturity of the process and materials. As manufacturers consider whether to incorporate DSA into specific technology nodes, they need to assure themselves that production-worthy yields can be achieved. Recent research at ... » read more

Manufacturing Bits: March 31


Shish kebab nano necklaces Using a directed self-assembly (DSA) process, Georgia Institute of Technology has developed a method to make nanometer-scale, chip-based necklaces. The technique could enable organic-inorganic structures, which resemble a tiny shish kebab or a centipede. The structures are made with various materials, such as semiconductors, magnetics, ferroelectrics and others. ... » read more

Challenges Mount For Patterning And Masks


Semiconductor Engineering sat down to discuss lithography and photomask trends with Uday Mitra, vice president and chief technology officer for the Etch Business Unit at [getentity id="22817" e_name="Applied Materials"]; Pawitter Mangat, senior manager and deputy director for EUV lithography at [getentity id="22819" comment="GlobalFoundries"]; Aki Fujimura, chief executive at [getentity id="228... » read more

5 Issues Under The SPIE Radar


As usual, the recent SPIE Advanced Lithography Conference was a busy, if not an overwhelming, event. At the event, there were endless presentations on the usual subjects, such as design, patterning, metrology and photoresists. And as in past years, one left the event with more questions than answers. At this year’s event, the most obvious question was (and still is) clear: Will extreme ult... » read more

Issues And Options At 5nm


While the foundries are ramping up their processes for the 16nm/14nm node, vendors are also busy developing technologies for 10nm and beyond. In fact, chipmakers are finalizing their 10nm process offerings, but they are still weighing the technology options for 7nm. And if that isn’t enough, IC makers are beginning to look at the options at 5nm and beyond. Today, chipmakers can see a p... » read more

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