tag: DSA

What If EUV Fails?
By Mark LaPedus - 17 Apr, 2014 - Comments: 2

It’s the worst kept secret in the industry, but extreme ultraviolet (EUV) lithography will likely miss the 10nm node. So, chipmakers will likely extend and use today’s 193nm immersion lithography down to 10nm. This, of course, will require a complex and expensive multiple patterning scheme. Now, chipmakers are formulating their lithography strategies for 7nm and beyond. As it stands now,... » read more

Directed Self-Assembly Gains Momentum
By Mark LaPedus - 20 Mar, 2014 - Comments: 0

At last year’s SPIE Advanced Lithography symposium, directed self-assembly (DSA) grabbed the spotlight as chipmakers provided the first glimpse of their initial work and results with the technology. The results were stunning, thereby propelling DSA from a curiosity item to a possible patterning solution for next-generation devices. Last year, in fact, GlobalFoundries, IBM, Intel and Sams... » read more

Under The Radar At SPIE
By Mark LaPedus - 20 Mar, 2014 - Comments: 2

At the SPIE Advanced Lithography symposium, the best and brightest minds in the lithography, metrology, resist and design-for-manufacturing (DFM) fields assemble for a week. The annual event is a good way to get a pulse on the current state of lithography. At this year’s SPIE, it was simple to get a reading. Extreme ultraviolet (EUV) lithography remains delayed. The other next-generation l... » read more

EUV Reaches A Crossroads
By Mark LaPedus - 20 Mar, 2014 - Comments: 3

[gettech id="31045" comment="EUV"] (EUV) [getkc id="80" comment="lithography"] is at a crossroads. 2014 represents a critical year for the technology. In fact, it may answer a pressing question about EUV: Does it work or not? It’s too early to make that determination right now, but there are more uncertainties than ever for the oft-delayed technology. Originally aimed for the 65nm node in... » read more

The Final Deadline For EUV
By Ed Sperling - 27 Feb, 2014 - Comments: 5

When TSMC disclosed this week—in a public forum—that its production EUV lithography test had failed in one of the early test runs due to a power source issue, there were very different reactions. EUV, after all, is an emotional issue with billions of dollars invested and lots of jobs riding on this technology. To begin with, there has been the usual spin control. The message essentially ... » read more

What Goes Around Comes Around: Moore’s Law At 10nm And Beyond
By Greg Yeric - 13 Feb, 2014 - Comments: 2

Modified by Greg Yeric from original by Eric Fischer Gordon Moore penned his famous observation in an era when the people developing the process were also the people designing the circuits. Over time, things got more complicated and work specialization set in, but all was well in the world for many years as the fabs kept delivering on Moore’s Law. Yes, designers had to come up with lot... » read more

IMEC’s 30th Anniversary: A Consortium With Impact
By Michael Watts - 01 Feb, 2014 - Comments: 0

In the history of semiconductor technology, one of the critical non-technology changes was the point when the biggest companies realized that they could not afford to do all the basic R&D. They agreed to collaborate in “pre-competitive” phase development through consortia such as IMEC and Sematech. IMEC is celebrating its 30th anniversary, and it’s interesting to recognize the signifi... » read more

Waiting For Next-Generation Lithography
By Mark LaPedus - 23 Jan, 2014 - Comments: 2

Nearly 30 years ago, optical lithography was supposed to hit the wall at the magical 1 micron barrier, prompting the need for a new patterning technology such as direct-write electron beam and X-ray lithography. At that time, however, the industry was able to push optical lithography for volume chip production at the 1-micron node and beyond. This, in turn, effectively killed direct-write e-... » read more

Manufacturing Bits: Dec. 17
By Mark LaPedus - 17 Dec, 2013 - Comments: 0

Implantable TFETs At the recent IEEE International Electron Devices Meeting (IEDM) in Washington, D.C., a number of companies, R&D organizations and universities described new breakthroughs in perhaps the next big thing in semiconductors--the tunnel field-effect transistor (TFET). Aimed for the 5nm node, TFETs are steep sub-threshold slope transistors that can scale the supply voltages bel... » read more

DSA, Multi-beam Make Steady Progress
By Mark LaPedus - 12 Dec, 2013 - Comments: 0

Semiconductor Engineering sat down to discuss current and future lithography challenges with Laurent Pain, lithography lab manager at CEA-Leti. What follows are excerpts of that conversation. SE: CEA-Leti has two major programs in lithography. One is in directed self-assembly (DSA) and the other is in multi-beam e-beam. Let’s start with multi-beam. What is Leti doing in multi-beam and what... » read more

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