tag: eFPGA

The Next Phase Of Machine Learning
By Kevin Fogarty - 09 Nov, 2017 - Comments: 0

Machine learning is all about doing complex calculations on huge volumes of data with increasing efficiency, and with a growing stockpile of success stories it has rapidly evolved from a rather obscure computer science concept into the go-to method for everything from facial recognition technology to autonomous cars. [getkc id="305" kc_name="Machine learning"] can apply to every corporate fu... » read more

The Case For Combining CPUs With FPGA Fabrics
By Alok Sanghavi - 08 Nov, 2017 - Comments: 0

Given that the industry is beginning to reach the limits of what can physically and economically be achieved through further shrinkage of process geometries, reducing feature size and increasing transistor counts is no longer achieving the same result it once did. Instead the industry is, quite rightly, focusing on fundamentally new system architectures and making better use of available silico... » read more

eFPGA IP Density, Portability And Scalability
By Flex Logix - 07 Nov, 2017 - Comments: 0

FPGA chip companies generally build a new generation of FPGAs every ~3 years when there is a major advance in process technology. They pick one foundry, one node, one variation of that node and do full-custom circuit design with typically the maximum or near-maximum number of metal layers in order to get the highest density FPGA they can. It takes them most of the 3 years to do the complex e... » read more

The Week In Review: Design
By Jesse Allen - 03 Nov, 2017 - Comments: 0

M&A Synopsys will acquire Black Duck Software, a provider of software for securing and managing open source software. Synopsys already has a stake in this area from its Coverity acquisition in 2014, which it has been using to analyze security practices in open source software. Founded in 2003 and headquartered in Massachusetts, Black Duck's products automate the process of identifying and ... » read more

New Interconnect Makes eFPGA Dense And Portable
By Geoff Tate - 02 Nov, 2017 - Comments: 0

FPGAs were invented over 30 years ago. Today they are much bigger and faster, but their basic architecture remains unchanged: logic blocks formed around LUTs (look-up-tables) in a sea of mesh (x/y grid) interconnect with a matrix of switches at every “intersection.” One FPGA company executive once said they don’t really sell programmable logic, they sell programmable interconnect, beca... » read more

eFPGA Acceleration in SoCs
By Achronix - 01 Nov, 2017 - Comments: 0

The Speedcore design and integration methodology has been defined with intimate awareness of the difficulties ASIC engineering teams must contend with. All the necessary files and flows for capturing the functional, timing and power characteristics of a user-defined and programmed Speedcore instance, along with support for successfully reconfiguring an already field-deployed Speedcore IP embedd... » read more

Evolution Of The MCU
By Ed Sperling - 26 Oct, 2017 - Comments: 0

Microcontrollers are taking on a variety of new and much more complex computing tasks, evolving from standalone chips to more highly integrated devices that can rival complex microprocessors. Microcontroller units (MCUs) are being designed into everything from assisted and autonomous driving to smart cards. They often are the central processing elements for a slew of connected devices that i... » read more

Targeting And Tailoring eFPGAs
By Ed Sperling - 17 Oct, 2017 - Comments: 0

Robert Blake, president and CEO of Achronix, sat down with Semiconductor Engineering to discuss what's changing in the embedded FPGA world, why new levels of customization are so important, and difficulty levels for implementing embedded programmability. What follows are excerpts of that discussion. SE: There are numerous ways you can go about creating a chip these days, but many of the prot... » read more

Toward System-Level Test
By Ed Sperling - 09 Oct, 2017 - Comments: 0

The push toward more complex integration in chips, advanced packaging, and the use of those chips for new applications is turning the test world upside down. Most people think of test as a single operation that is performed during manufacturing. In reality it is a portfolio of separate operations, and the number of tests required is growing as designs become more heterogeneous and as they ar... » read more

Basics Of Embedded FPGA Acceleration
By Alok Sanghavi - 05 Oct, 2017 - Comments: 0

Making a chip run faster is no longer guaranteed by shrinking features or moving to a different manufacturing process. It now requires a fundamental change in the architecture of the chip itself. The days of the single-processor, or even single multi-core processors, are gone. The focus has shifted to different kinds of processors for different kinds of data and many different protocols and ... » read more

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