Building Complex Chips That Last Longer

By Ed Sperling - 23 Sep, 2021 - Comments: 0

Semiconductor Engineering sat down to talk about design challenges in advanced packages and nodes with John Lee, vice president and general manager for semiconductors at Ansys; Shankar Krishnamoorthy, general manager of Synopsys' Design Group; Simon Burke, distinguished engineer at Xilinx; and Andrew Kahng, professor of CSE and ECE at UC San Diego. This discussion was held at the Ansys IDEAS co... » read more

Using ML In EDA

By Ed Sperling - 20 Sep, 2021 - Comments: 0

Machine learning is becoming essential for designing chips due to the growing volume of data stemming from increasing density and complexity. Nick Ni, director of product marketing for AI at Xilinx, examines why machine learning is gaining traction at advanced nodes, where it’s being used today and how it will be used in the future, how quality of results compare with and without ML, and what... » read more

A New Vision For Memory Chip Design And Verification

By Anand Thiruvengadam - 02 Sep, 2021 - Comments: 0

Discrete memory chips are arguably the most visible reminder of the opportunities and challenges for advanced semiconductor design. They are manufactured in huge quantities, becoming key drivers for new technology nodes and new fabrication processes. Price fluctuations have a major impact on the financial health of the electronics industry, and any shortages can shut down the manufacturing line... » read more

Best Practices For Deploying Cliosoft SOS On AWS

By Cliosoft - 01 Sep, 2021 - Comments: 0

Semiconductor Integrated Circuits (ICs) are at the center of a number of modern technological innovations. To keep up with the ever-increasing pace of innovation, IC design teams require robust, scalable design management (DM) solutions to enable seamless global collaboration and increase productivity. This eBook outlines the advantages of, and best practices, for deploying Cliosoft SOS design ... » read more

Steering The Semiconductor Industry

By Brian Bailey - 26 Aug, 2021 - Comments: 2

Progress in semiconductors has been one of the most successful engineering feats, and the industry has ridden an exponential curve longer than anything else in history. It is also a highly conservative industry that has pushed away many disruptive changes in favor of small incremental changes that minimize risk. There have been significant changes over the decades, and they often required a ... » read more

Impact Of GAA Transistors At 3/2nm

By Brian Bailey - 16 Aug, 2021 - Comments: 2

The chip industry is poised for another change in transistor structure as gate-all-around (GAA) FETs replace finFETs at 3nm and below, creating a new set of challenges for design teams that will need to be fully understood and addressed. GAA FETs are considered an evolutionary step from finFETs, but the impact on design flows and tools is still expected to be significant. GAA FETs will offer... » read more

Choosing The Right Model Fidelity For Your Digital Twin

By Frank Schirrmeister - 29 Jul, 2021 - Comments: 0

The EDA industry has advanced by leaps and bounds with innovation. Every time we approach a new technology node, many algorithms have to be re-imagined. As the late Jim Ready often pointed out to me, compared to the world of software development, these semiconductor technology changes are the hardware equivalent to what Fred Brooks, in his seminal article “No Silver Bullet—Essence and Accid... » read more

EDA, IP Numbers In Record Territory

By Ed Sperling - 16 Jul, 2021 - Comments: 0

EDA and semiconductor IP revenue soared to a new high, up 17% worldwide in Q1 compared to the same period in 2020, with revenue in China surging 73%, according to new data from SEMI's Electronic System Design Alliance. For many financial reports outside of semiconductors, strong growth numbers can be misleading because they reflect comparatively weak earnings stemming from pandemic-related s... » read more

CEO Outlook: Chiplets, Longer IC Lifetimes, More End Markets

By Ed Sperling - 14 Jul, 2021 - Comments: 1

Experts at the Table: Semiconductor Engineering sat down to discuss chiplets, longer IC lifetimes, and a spike in the number of end applications with Lip-Bu Tan, CEO of Cadence; Simon Segars, CEO of Arm; Joseph Sawicki, executive vice president of Siemens IC EDA; John Kibarian, CEO of PDF Solutions; Prakash Narain, president and CEO of Real Intent; Dean Drako, president and CEO of IC Manage; an... » read more

Lower Power Chips: What To Watch Out For

By Ann Mutschler - 08 Jul, 2021 - Comments: 0

Low-power design in advanced nodes and advanced packaging is becoming a multi-faceted, multi-disciplinary challenge, where a long list of issues need to be solved both individually and in the context of other issues. With each new leading-edge process node, and with increasingly dense packaging, the potential for problematic interactions is growing. That, in turn, can lead to poor yield, cos... » read more

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Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

by Bryon Moyer

New AI Processors Architectures Balance Speed With Efficiency

Hot Chips 24: Large language models ratchet up pressure for sustainable computing and heterogeneous integration; data management becomes key differentiator.